Researchers Devise 4-D Memory

George P. BurdellOnly months after Samsung’s announcement of 3D memory production a new 4-dimensional memory has been prototyped by university researchers.  This memory not only has bits in the X and Y dimensions, like planar NAND, and the Z dimension, like 3D NAND, but it also grows in capacity over time, spanning the fourth dimension: time.

This research has been spearheaded by George P. Burdell, Assistant Associate Professor pro tem at Death Valley University.  The work is the culmination of a decades-long effort to find a way to increase memory sizes in systems without the need to replace chips or modules.

The team has created the name “Growing RAM” or “GRAM” for the technology.  Current prototypes exhibit very favorable Continue reading

Spansion’s Super-Fast HyperFlash NOR

Comparing Spansion's HyperFlash against the speed of alternative interfacesSpansion recently introduced a NOR flash that the company boasts is the: “World’s fastest NOR flash memory”.  Named HyperFlash, the chip taps into high-speed SPI interface, doubling its width and adding a differential clock to run at an I/O rates as high as 333MB/s.

In this post’s graphic (click to enlarge) Spansion compares the HyperFlash chip’s sustained read rate (right-hand column) to that of (from left to right) asynchronous parallel NOR, single-bit SPI, industry-standard DDR Quad SPI, and Spansion’s faster rendition of DDR Quad SPI, which Spansion tells us, until now, has been the fastest flash on the market.  The company points out that HyperFlash is five times the speed of industry-standard Continue reading

Comparing Samsung V-NAND to Micron 16nm Planar NAND

Andrew Walker, SchiltronI was recently directed to a very interesting blog post written by 3D technologist Andrew Walker of Schiltron in which he compares two NAND flash chips that were presented at the IEEE International Solid State Circuits Conference (ISSCC) on February 12.

The post, titled Samsung’s V-NAND Flash at the 2014 ISSCC: Ye Distant Spires… is on the 3D InCites website.

Dr. Walker puts a lot more time and effort into his graphic representations of 3D NAND chips than do others (The Memory Guy included) and this makes it much easier to understand the issues he points out.  He shows us that Samsung’s 3D NAND cell is about 5 times the size of a 40nm planar NAND cell and about 30 times that of Micron’s 16nm planar cell, and that the 3D NAND’s physical area is unlikely to change with any future 3D technology generations.

For this and other reasons (given in the article) he states that the Samsung V-NAND is “an impressive achievement but not a realistic foundation for the future.”

After having compiled my series on 3D NAND I can appreciate Dr. Walker’s opinion.  This is certainly going to be a difficult technology to master, and it could be quite some time before the cost structure for 3D NAND can compete against that of today’s planar technologies.

Give the Walker post a quick read and judge for yourself whether we are at the brink of a 3D conversion or if this technology can be expected to slip out a few years.

Why NAND is So Difficult to Scale

ASML chart chowing the lithography used for 4X, 3X, 2X, and 1Xnm planar NAND and 3D NANDNAND flash is the process leader in memory technology, and this puts it in a very challenging position: It must ramp to high volume production using techniques that have never been tried before.

The graphic for this post (click to enlarge), supplied by ASML, the semiconductor industry’s leading lithography tool supplier, illustrates the challenge of migrating from one process node to the next.  Across the bottom, on the X-axis, are representative process nodes ranging from “2D-45″, or two-dimensional (planar) 45nm NAND, to “3D-5x”, or three-dimensional 5xnm NAND.  Below these numbers are the year of volume production.

The vertical axis, labeled “Tolerance” represents the minimum Continue reading

Did SK hynix Beat Samsung to the 8Gb LPDDR4?

SK hynix (top) and Samsung (bottom) 8Gb 20nm-class LPDDR4Every so often something very strange happens that puzzles The Memory Guy.  On December 29 (or Dec. 30 in Seoul) something odd occurred.

I received two e-mails, one from SK hynix at 3:55 PM Pacific Time, and one from Samsung exactly one hour later.  Both were press releases.

The SK hynix release was titled: “SK Hynix Developed the World’s First Next Generation Mobile Memory LPDDR4″.  It announced that the company is sampling its 20nm-class 8Gb LPDDR4 DRAM to customers.

The Samsung release was Continue reading

3D NAND: Who Will Make It and When?

SK hynix 3D NAND Cross SectionThis series has looked at 3D NAND technology in a good deal of technical depth.  The last question to be answered centers around the players and the timing of the technology.  A lot has been said about the technology and its necessity.  Will everyone be making 3D NAND?  When will this big transition occur?

This post will provide an update as of its publication (13 December 2013) to show each company’s current status, to the best of The Memory Guy’s understanding.  Readers may want to refer back to the earlier posts in this series, as well as to a June 2013 Nikkei TechON article that gives a good review of the 3D NAND alternatives that have been presented at various technical conferences.

Let’s start with Samsung, the largest producer of NAND flash today.  Just prior to Memcon 2013 last Continue reading

Rambus and Micron Sign License Agreement

The following is excerpted from an Objective Analysis Alert that can be downloaded from the company’s website.

Micron Licenses Rambus IPRambus and Micron announced on Tuesday that they have signed a patent cross license agreement.  Micron receives rights to Rambus IC patents, including memories.  Both Micron and Elpida products will be covered.  The companies have thus settled all outstanding patent and antitrust claims in their 13-year court battle.

Micron will make royalty payments to Rambus of up to $10 million per quarter over the next seven years, totaling $280 million, after which Micron will receive a perpetual, paid-up license.

Rambus and Micron both have Continue reading

3D NAND’s Impact on the Equipment Market

Costs to Migrate to Next Lithography Node - Applied Materials (click to enlarge)A very unusual side effect of the move to 3D NAND will be the impact on the equipment market.  3D NAND takes the pressure off of lithographic steps and focuses more attention on deposition and etch.  The reason for going to 3D is that it provides a path to higher density memories without requiring lithographic shrinks.

This sounds like bad news for stepper makers like ASML, Canon, and Nikon while it should be a boon to deposition and etch equipment makers like Applied Materials, Tokyo Electron, and Lam Research.

In its summer 2013 V-NAND announcement, Samsung explained that it would be Continue reading

What is a “Multilayer Cell”?

MLCFrom time to time I get questions from investors in the memory business asking: “What is a multilayer cell?”

The answer is: “There is no such thing: It’s a misstatement.”

The term “MLC” has, by a number of people, been mistranslated to “multi-layer cell.”  The misunderstanding appears to have originated in the financial community.  People in the flash memory business never use the term at all.

Yes, we talk about MLC, but to us the term means “multilevel cell”.

A multilevel cell is a cell that uses varying voltage levels to represent different states.  With four voltage levels the resulting four states on a single cell can be turned into Continue reading

How Do You Erase and Program 3D NAND?

How FN Tunneling WorksSome of my readers have asked: “How is 3D NAND programmed and erased?  Is it any different from planar NAND?”

In a word: No.

(Before I get too far into this allow me to admit that The Memory Guy doesn’t understand quantum physics, so I will be presenting this only to the depth that I understand it.  There will be no band-gap diagrams or equations to wrestle with.)

Both 3D NAND and planar NAND use Fowler Nordheim Tunneling (FN) to both program and erase.  This differs from NOR flash which programs bits using Continue reading

Contact

Jim Handy Objective Analysis Memory Market Research +1 (408) 356-2549 Jim.Handy (at) Objective-Analysis.com

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