- At its peak in the late 1980s the DRAM market sported 23 suppliers.
- Today there are 6 suppliers of any note: Samsung, Hynix, Micron, Elpida, Nanya, and Powerchip
- The already-depressed market is only going to worsen in 2012. Capital spending in 2010 is seeing to that. Although many believe that prices cannot get any lower, that is exactly what they will do in 2012. Continue reading
This product appears to be a variation on the Hybrid Memory Cube, or HMC concept detailed in a prior post.
Remember that the HMC stacks a number of DRAM chips atop a logic chip. The memories store data and communicate to the logic chip through thousands of through-silicon vias (TSVs) while the logic chip handles communications with the outside world. Continue reading
What is a Content-Addressable Memory (CAM)? The Memory Guy decided to post this after having recently run across a very strange web post HERE that erroneously inferred that CAM chips from NEC could be a threat to NAND-based SSDs. The article was based on a press release from NEC and Tohoku University that can be read HERE.
It’s not at all surprising that the release was misunderstood – it’s very awkwardly written:
The new CAM utilizes the vertical magnetization of vertical domain wall elements in reaction to magnetic substances in order to enable data that is processing within the CAM to be stored on a circuit without using power.
I got a phone call yesterday from Russell Fish of Venray Technology. He wanted to talk about how and why computer architecture is destined for a change.
I will disclose right up front that he and I were college classmates. Even so, I will do my best to give the unbiased viewpoint that my clients expect of me.
Russell is tormented by an affliction that troubles many of us in technology: We see the direction that technology is headed, then we consider what makes sense, and we can’t tolerate any conflicts between the two.
In Russell’s case, the problem is the memory/processor speed bottleneck.
Micron Technology and Intel announced today (6 December, 2011) that the two companies are sampling a 128 gigabit (that’s 16 gigabytes) NAND flash chip manufactured by the company’s IMFT joint venture.
This is a doubling of the capacity of the 64Gb chip the companies announced in April, but they assure us that the size of the die hasn’t doubled, and the accompanying photo supports this. Intel tells us that the die will fit into standard BGA and TSOP packages. Continue reading
In a December 1 press release IBM announced that the company will be manufacturing Micron Technology’s Hybrid Memory Cube (HMC) which IBM claims to be “the first commercial CMOS manufacturing technology to employ through-silicon vias (TSVs).”
This device is one that Altera, Intel, Micron, Open Silicon, Samsung, and Xilinx have all presented recently as a plausible solution to the difficulty of increasing the speed of DRAM/processor communications. The Hybrid Memory Cube Consortium (HMCC) website offers a deep dive into the details of the consortium and the technology.
Welcome to “The Memory Guy” the Objective Analysis blog about the world of semiconductor memory chips.
Our goal is to discuss all memory chips, both big and small, that are so prevalent in our electronic accessories. We hope to do that while keeping things brief, light, understandable, and entertaining. Technologies we’ll cover include DRAM, NAND flash, SRAM, NOR flash, EPROM, EEPROM, mask ROM, and all other forms of memory.