Few NAND flash users realize that these chips have a lot of internally-adjusted parameters that are tuned to optimize performance, endurance, and yield. The operation of these parameters is a closely-held secret that flash makers share with very few of their most important customers. Other customers won’t even learn how to access these parameters!
The Memory Guy can’t claim to know what any of the parameters really are, but I have been given the understanding that they control things like the voltage thresholds used to determine which bit is represented on an MLC cell, or how much energy to put into a bit cell when it’s being programmed or erased. I hear that there are hundreds of these parameters, and they are all painstakingly hand-tuned by highly talented experts during a new chip’s characterization phase to assure that the chip will yield to the required specifications. Once the magic set of parameters has been determined, then the parameters of all subsequent chips are set to the same values.
It’s a long and arduous struggle to get the first chip tuned, though.
Some university researchers in Ireland decided that there must be a better way to do this and created Continue reading
Every so often something very strange happens that puzzles The Memory Guy. On December 29 (or Dec. 30 in Seoul) something odd occurred.
I received two e-mails, one from SK hynix at 3:55 PM Pacific Time, and one from Samsung exactly one hour later. Both were press releases.
The SK hynix release was titled: “SK Hynix Developed the World’s First Next Generation Mobile Memory LPDDR4”. It announced that the company is sampling its 20nm-class 8Gb LPDDR4 DRAM to customers.
The Samsung release was Continue reading