3D NAND: Who Will Make It and When?
This series has looked at 3D NAND technology in a good deal of technical depth. The last question to be answered centers around the players and the timing of the technology. A lot has been said about the technology and its necessity. Will everyone be making 3D NAND? When will this big transition occur?
This post will provide an update as of its publication (13 December 2013) to show each company’s current status, to the best of The Memory Guy’s understanding. Readers may want to refer back to the earlier posts in this series, as well as to a June 2013 Nikkei TechON article that gives a good review of the 3D NAND alternatives that have been presented at various technical conferences.
Let’s start with Samsung, the largest producer of NAND flash today. Just prior to Memcon 2013 last August Samsung announced mass production of its 3D “V-NAND” product (for “Vertical NAND”) and at the Flash Memory Summit that same month the company introduced enterprise SSDs based on the technology.
In comparison, at an investor conference only a few months earlier, in May 2013, SanDisk plotted the path for its next two generations of planar NAND (dubbed 1Ynm and 1Znm) and showed charts to explain that the company did not expect for 3D NAND to be cost-effective until those two generations had run their course. SanDisk presented a timeline with a pilot run of 3D NAND in late 2015 becoming production in 2016.
Clearly SanDisk and Samsung have very different roadmaps. So does the rest of the NAND flash cosmos.
(Please note that Toshiba and SanDisk introduce the same products at the same time by nature of their joint venture. The same can be said of Intel and Micron. For brevity’s sake, I will only name SanDisk and Micron when speaking of these JVs.)
So, Samsung says it is moving to 3D now, and SanDisk in 2016. What of the two others, Hynix and Micron?
At the August 2013 Flash Memory Summit SK hynix announced that it would sample 3D NAND by the end of the year. (This post’s graphic shows, in side-by-side cross section images, an illustration of the SK hynix 3D NAND design and an electron micrograph of that device.) At about the same time, in a CNET interview, Micron CEO Mark Durcan explained that the company plans to sample 3D NAND in the first quarter of 2014, but indicated that the company’s 3D timing would be determined by strategy, and not technology.
A month earlier, in July, Micron announced that it is sampling 16nm planar NAND. SK hynix also announced full production of a 16nm planar part in November.
It is generally understood that planar NAND can’t be produced below about 20nm without using a High-k gate dielectric. High-k materials are pretty tricky to put into production: Micron introduced High-k at the 20nm process node, but delayed ramping production to this node for roughly a year, presumably because of difficulty getting the process to beat the cost of the company’s 25nm process.
In this light, the SK hynix 16nm announcement is a little surprising. SK hynix has not mentioned any use of High-k dielectrics, but has said that it was using an “air gap,” another new technology that may be challenging to bring to mass production.
Samsung’s strategy appears to be to skip the headache of ramping a High-k planar NAND and to confront the inevitable headache of 3D early on. Even so, since TCAT uses a High-k gate dielectric, the High-k headache will still be a part of the Samsung technology roadmap.
Hynix is introducing a very aggressive planar technology and early introduction of 3D at the same time. It will be interesting to see how this plays out. Hynix is pretty advanced when it comes to technology, even though few in the industry give the company credit for that distinction.
Micron tends to be quieter than other firms about new technologies, seldom disclosing much of anything prior to sampling. The company has shared very little about its 3D technology at technology conferences, but did show a cross section of a Micron 3D NAND chip during a 2011 Flash Memory Summit keynote, and revealed work on a 256Gb 3D NAND at the 2013 Flash Memory Summit. (The graphic for the first post in this series is based on the electron micrograph of Micron’s 3D NAND in the 2011 keynote.) Micron is clearly developing the technology, but neither Micron nor its partner Intel, has disclosed much about it.
In a way this is consistent with the Micron/Intel approach to new technology introductions. While Samsung often boasts that a technology is available well in advance of its actual appearance, Micron, Intel, and their IMFT joint venture rarely discuss a new technology until it is already sampling.
From today’s perspective it would seem that Samsung and Hynix should be shipping their brand of 3D product to some extent in 2013 (although there is reason to anticipate some bumps in the road), Micron in 2014, and that SanDisk won’t ship until 2016. As of mid-December nobody I know of (outside of the NAND makers themselves) has seen a sample.
Aside from today’s complete absence of samples there are other reasons to doubt that 3D NAND is ready for production. A recent IEEE article poses several discouraging points, leading to the conclusion that 3D NAND in its current form may never become cost competitive against more lithographically-intensive designs.
In the end, it appears that very little can actually be said about each company’s 3D NAND status. We have players who have announced mass production but are not yet sampling, players who have set a future schedule to sample but nothing more, and players who have stated that they will not produce until 3D NAND costs can be brought below those of planar technologies. Meanwhile, the IEEE article points to a future that may not include the current versions of 3D NAND at all!
This is certain to be an interesting technology to watch over the next few years. Will 3D NAND actually materialize? It’s hard to tell. If it doesn’t, though, I have no doubt that researchers will create incredibly clever new approaches to continue to reduce the cost of NAND flash for the next decade.
If you’re like me, you have read in this series about macaroni channels and cheese charge traps, as well as layer cakes, and you may be starting to feel hungry for junk food. Maybe we should take a break and go get something to eat! It’s been a long and technical series of posts. Thanks for bearing with The Memory Guy as I explored the technology.
I would especially like to thank my reviewers, twelve wonderful people who generously gave me their time and suggestions to help make this series as clear and accurate as possible, and I must also thank the technical geniuses who helped me to understand 3D NAND technology by explaining arcane concepts at a level low enough for me to grasp.
This post is the last of a series called What is 3D NAND? Why do we need it? How do they make it? that was published in weekly segments during the fourth quarter of 2013 on The Memory Guy blog. The different sections are listed below, with a hot link to each section.
- Why Do We Need 3D NAND?
- What Is a 3D NAND?
- Making a Vertical NAND String
- An Alternative Kind of Vertical 3D NAND String
- How Do You Access the Control Gates?
- Benefits of Charge Traps over Floating Gates
- How Do You Erase and Program 3D NAND?
- 3D NAND’s Impact on the Equipment Market
- Who Will Make It and When?
Click on any of the above links to learn more about 3D NAND technology.