How short is that list? Interestingly, Intel and Micron have different lists. The Micron list, shown in this post’s graphic (click to enlarge), cites seven types: “Ram” (showing a vacuum tube), PROM, SRAM, DRAM, EPROM, NOR flash, and NAND flash. Intel’s list adds magnetic bubble memory, making it eight. (Definitions of these names appear in another Memory Guy blog post.)
The Memory Guy finds both lists puzzling in that they left out a number of important technologies.
For example, why did Intel neglect EEPROM, which was an Intel invention that is still in widespread use? EEPROMs (or E²PROMs) are not only found in nearly every application that has a serial number (ranging from WiFi routers to credit cards), requires calibration (like blood glucose monitoring strips and printer ink cartridges), or provides operating parameters (i.e. the serial presence detect – SPD – in DRAM DIMMs), but they still ship in the billions of units every year. In its time EEPROM was an important breakthrough. Over the years EEPROM has had a much greater impact than has PROM.
And, given that both companies were willing to include tubes, a non-semiconductor technology, why did both Continue reading
Micron and Intel hosted an event in San Francisco Tuesday, July 28, to introduce a new memory technology that they have named “3D XPoint”. This technology was explained to be “up to 1,000 times faster, with 1,000 times the endurance of NAND flash” while being significantly cheaper than DRAM.
Some technical details:
- 3D XPoint is a “Fundamentally Different Technology” than current memory types. It’s an ReRAM that uses material property changes for bit storage where both DRAM and NAND use charge to store a bit
- The chip currently stores 128Gb in two stacked planes of 64Gb each, storing a single bit per cell
- Today’s densest production NAND flash chips store 128GB by using MLC, so this chip actually has twice as many bit cells as any production NAND flash
- The companies do not see a clear limit to the number of planes they can stack, but are optimistic about this
- The bulk mechanism can be used to store multiple bits on a single cell (MLC)
- Today’s chip is made using a 20nm process, but can scale well past that
- There is no clear limit of how far the technology can be scaled
- It’s 1,000 times faster than NAND flash and offers 1,000 times NAND’s endurance
- It’s 10 times as dense as today’s “Conventional Memory” (which I suppose to be DRAM)
- This is not intended to replace either NAND or DRAM, but to coexist as a new memory layer between NAND and DRAM
The companies claim that other Continue reading
Today Avalanche Technology announced that it is sampling MRAM, making it the world’s second company to actually produce this much-researched technology.
For those unfamiliar with MRAM, it is one of a number of technologies being positioned to replace currently-entrenched memory technologies once they reach their scaling limits. Regular Memory Guy readers know that this juncture has been anticipated for a few decades, but always seems to get postponed.
MRAM, like many other alternative technologies, offers the promise of scaling beyond the limits of DRAM and NAND to become cheaper than ether of these technologies. Add to this its fast write speed, low power, lack of refresh, nearly unlimited endurance, and nonvolatility, and it becomes a very compelling alternative over the long term.
As opposed to the other MRAM-maker Everspin, Avalanche’s MRAM uses Continue reading
There has been quite a lot of interest over the past few days about the apparently-inadvertent disclosure by Intel of its server platform roadmap. Detailed coverage in The Platform showed a couple of slides with key memory information for the upcoming Purley server platform which will support the Xeon “Skylake” processor family.
One slide, titled: “Purley: Biggest Platform Advancement Since Nehalem” includes this post’s graphic, which tells of a memory with: “Up to 4x the capacity & lower cost than DRAM, and 500x faster than NAND.”
The Memory Guy puzzled a bit about what this might be. The only memory chip technology today with a cost structure lower than that of DRAM is NAND flash, and there is unlikely to be any technology within the leaked roadmap’s 2015-2017 time span that will change that. MRAM, ReRAM, PCM, FRAM, and other technologies can’t beat DRAM’s cost, and will probably take close to a decade to get to that point.
Since that’s the case, then what is this mystery memory? If we think of memory systems, rather than memory chips we can come up with one very plausible answer. Intel may be very Continue reading
Everspin and Northwest Logic have just announced full interoperability between Northwest Logic’s MRAM Controller Core and Everspin Technologies’ ST-MRAM (Spin-Torque Magnetic RAM) chips. This interoperability is hardware proven on a Xilinx Virtex-7 FPGA and is now available for designs needing low-latency, high memory throughput using MRAM technology.
Since The Memory Guy knew that Everspin’s EMD3D064M ST-MRAM was fully DDR3 compatible, I had to wonder why the part would require a special controller – couldn’t it simply be controlled by any DDR3 controller?
Everspin’s product marketing director, Joe O’Hare, took the time to Continue reading
In a move touted as a merger of equals, Cypress will acquire Spansion in an all-stock transaction slated to close in the second quarter of 2015. The purchase price is estimated at $1.6 billion.
Cypress points out that it is the leading producer of SRAMs, and that Spansion is the leading NOR flash provider.
One striking feature of this transaction is the Continue reading
Wiley has recently published a new book by Betty Prince titled Vertical 3D NAND Technologies that is one to consider if you want to bring yourself up to speed on recent research behind today’s and tomorrow’s 3D memory technologies.
For those who haven’t previously encountered Dr. Prince, she is the author of a number of key books covering memory design and holds memory patents written over her 30-year career in the field.
The book provides capsule summaries of over 360 papers and articles from scholarly journals on the subject of 3D memories, including DRAM, NAND flash, and stacked chips.
These papers are organized into Continue reading
Although the course was very well received, I never posted a link to it on The Memory Guy blog. This post is intended to correct that error.
The course runs 75 minutes and covers the basics of DRAM, non-volatile RAM, SRAM, NAND flash, NOR flash, mask ROM, and EEPROM. It explains each technology’s advances in size, cost and performance, leading up to the development of Continue reading
Only months after Samsung’s announcement of 3D memory production a new 4-dimensional memory has been prototyped by university researchers. This memory not only has bits in the X and Y dimensions, like planar NAND, and the Z dimension, like 3D NAND, but it also grows in capacity over time, spanning the fourth dimension: time.
This research has been spearheaded by George P. Burdell, Assistant Associate Professor pro tem at Death Valley University. The work is the culmination of a decades-long effort to find a way to increase memory sizes in systems without the need to replace chips or modules.
The team has created the name “Growing RAM” or “GRAM” for the technology. Current prototypes exhibit very favorable Continue reading