Tomorrow’s Memory Technologies

Researchers Devise 4-D Memory

George P. BurdellOnly months after Samsung’s announcement of 3D memory production a new 4-dimensional memory has been prototyped by university researchers.  This memory not only has bits in the X and Y dimensions, like planar NAND, and the Z dimension, like 3D NAND, but it also grows in capacity over time, spanning the fourth dimension: time.

This research has been spearheaded by George P. Burdell, Assistant Associate Professor pro tem at Death Valley University.  The work is the culmination of a decades-long effort to find a way to increase memory sizes in systems without the need to replace chips or modules.

The team has created the name “Growing RAM” or “GRAM” for the technology.  Current prototypes exhibit very favorable Continue reading

Crossbar’s Radical New Memory Technology

Cross Section of the Crossbar Memory CellCrossbar, Inc. has come out of stealth mode with a fascinating new alternative memory technology.  Furthermore, the company says that a working memory array has been produced at a commercial fab.

Crossbar says that the technology can put a terabyte onto a single chip.  The company has already measured filaments as thin as 6nm, and is confident that it can be shrunk further and that it will support multilevel cells.

Crossbar’s device is a silver filament ReRAM with a difference.  For one, the silver filaments are in standard silicon dioxide, probably the most Continue reading

New Memory Bonding Technique Shows Promise

Spider Attaching Bonding Wires on Multi-Chip StacksIn a new cross-disciplinary effort, researchers have developed a novel approach to attach bonding wires to stacks of memory chips.  The new technique, being called a “breakthrough” by its developers, promises to allow chips to be stacked to several times their current 8-chip and 16-chip heights.

At issue is the challenge of precisely bonding wires a fraction of the diameter of a human hair over great distances without their inadvertently coming into contact with their neighbors to create a short circuit.  Such a short could destroy one or more of the chips in the stack, rendering the entire stack useless.  The mechanical means of attaching these wires, although highly sophisticated, still has significant issues, that limit the economics of higher stacks.

Researchers at the Berea University of Geology (BUG) in Berea, Kentucky, noticed that certain Continue reading

Macronix Solves Flash Wear Problem

Macronix Headquarters, Hsinchu TaiwanThe December issue of the IEEE Spectrum includes a fascinating article about a 100 million cycle flash memory developed by Macronix.  The company will present this design at at IEDM this month.

In brief: Macronix’ researchers buried a heater in the array to heat the tunnel dielectric, annealing out the disruptions & traps that might cause a bit to fail.

A prototype has so far been tested more than 100 million cycles and it shows no sign of impending failure.  Researchers believe that it is likely to reach one billion or more cycles, but such testing will take several months.  This just may be able to Continue reading

History of Memory Slideshow in EE Times

EE TimesEE Times has published a very interesting slideshow called: A Brief History of Memory by Kristin Lewotsky.  This is recommended reading for all who peruse of The Memory Guy blog.  Even the comments are good reading, with one commenter sharing a history of ferroelectrics that dates back to the 1950s.

It’s interesting to see the Continue reading

Everspin Samples First STT MRAM

Everspin today announced that select customers have been sampled the world’s first “ST-RAM” a 64Mb chip using STT MRAM technology, rather than Everspin’s existing production toggle MRAM technology.

For the past decade or so memory researchers have been looking to Spin Transfer Torque (sometimes called “Spin Torque Transfer”) MRAMs as a way of getting to tighter processes than conventional toggle MRAM.  It seems that current densities in toggle MRAM rise too high as the process shrinks – at some point the process could no longer scale since chips would burn themselves out during programming.  The ST-RAM paves Everspin’s path toward Continue reading

Adesto Acquires Atmel’s Serial NOR Business

Atmel Sells Serial Flash Business to AdestoIt’s not often that a small private firm acquires a part of a larger public firm, but that’s what happened today with Atmel and Adesto.  Adesto, a manufacturer of alternative memory technology, has purchased Atmel’s serial NOR flash business for an undisclosed sum.

The transaction covers the Atmel “Data Flash” and “BIOS Flash” product families and the employees supporting those products.  Atmel has retained its Serial EEPROM, Crypto and Digital Temperature Sensor memory product lines and plans to continue to invest in those businesses.

This is not a small thing.  Serial NOR now accounts for roughly Continue reading

Alternative Memory Technologies Patiently Wait For Market to Explode

Cross Section of a PCM Bit CellLane Mason of Objective Analysis recently shared with The Memory Guy an article he wrote for the 4 April 2007 Denali Memory Report covering Phase Change Memory (PCM or PRAM.)  It looked like something big was about to happen with the technology: PCM looked nearly ready to enter production.

The article included an excerpt of an EE Times interview with Micron’s CEO, the late Steve Appleton, in which Appleton stated that PCM advocates threatened to take over the memory market in 2000.

Here it is 2012, and PCM represents little more than a drop in the bucket when it comes to memory sales, although Continue reading

Micron PCM Enters Mass Production

Cover of Electronics Magazine, 28 September, 1970, with Intel PCM articleAfter years of prototyping Micron Technology claims to be the first to introduce production volumes of Phase-Change Memory, or PCM.  This memory, also known as PRAM, has long been positioned as a contender to replace flash once flash reaches its scaling limit.  Rather than use electrons to store a bit, PCM uses a type of glass that is conductive when in a crystalline state and resistive when amorphous, two states that are relatively easy to control.  The size of the bits can shrink to a very small dimensions, allowing PCM to scale into the single-digit number of nanometers, which most folks today believe to be beyond the realm of flash.

This product began its life at Intel, then followed the Numonyx spin-off, and was taken over by Micron when it acquired Numonyx.  In fact, Intel got into PCM very early on – this post’s graphic is the cover of an Electronics Magazine from September 1970 with an Intel story, written by Gordon Moore, telling about a 128-bit PCM research chip.

So far only three companies have produced samples Continue reading

A New Way to Build Phase-Change Memory (PCM)

The University of Pennsylvania CrestAn acquaintance recently brought to my attention an article in R&D Magazine about some pioneering research on phase-change memories or PCM.  The researchers’ findings hold a lot of promise.  (R&D Magazine’s article is based upon an original paper in the journal Science.)

A team led by Ritesh Agarwal, associate professor at the University of Pennsylvania, was trying to develop a better understanding of the mechanism behind the phase changes in PCM.  The team found that existing programming algorithms that involve melting the material could be replaced with pulses of electrical current that not only would program the cell without heat, but provided an “On” to “Off” resistance ratio of 2-3 orders of magnitude, which renders the cell significantly easier to read, especially in the presence of noise.  This effectively makes memory chip design Continue reading

Contact

Jim Handy Objective Analysis Memory Market Research +1 (408) 356-2549 Jim.Handy (at) Objective-Analysis.com

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