Resistive RAM RRAM

Memsys: A New Memory Conference

1999 White HouseSince I am the Memory Guy I hate learning that I missed something new and cool in the world of memories, but somehow I was unaware of last week’s Memsys conference in Washington DC until a participant notified me on Saturday that his paper: “Reverse Engineering of DRAMs: Row Hammer with Crosshair,” had been given the the best paper award.

Upon looking at the Memsys website it looks like a very intriguing academic conference.  about sixty papers were presented in eight interesting sessions:

  • Issues in High Performance Computing
  • Nonvolatile Main Memories and DRAM Caches, Parts I & II
  • Hybrid Memory Cube and Alternative DRAM Channels
  • Thinking Outside the Box
  • Improving the DRAM Device Architecture
  • Issues and Interconnects for 2.5D and 3D Packaging
  • Some Amazingly Cool Physical Experiments

in addition to a few apparently-fascinating keynotes.

Fortunately, all of the papers are Continue reading

Toshiba Restructuring: New 3D Fab Coming

Toshiba Yokkaichi Fab ComplexBeleaguered Toshiba finally unveiled its restructuring plan on Friday.  The plan aims to return the company to profitability and growth through management accountability.

A lot of the presentation focused on the memory business, a shining star of the Toshiba conglomerate, which has so far included appliances, nuclear power plants, and medical electronics.

Toshiba has big plans for its Semiconductor & Storage Products Company, calling it “A pillar of income with Memories as a core business”.  The company plans to enhance its NAND flash cost competitiveness by accelerating development of BiCS (Toshiba’s 3D NAND technology) and by expanding its SSD business.   There are three parts to this effort:

  1. Grow 3D NAND production capacity
  2. Speed up 3D NAND development
  3. Increase SSD development resources

This post’s graphic is an Continue reading

Crossbar or Crosspoint?

Computing Crossbar SwitchThe Memory Guy has recently run across a point of confusion between two very similar terms: Crossbar and Crosspoint.

A crosspoint memory is a memory where a bit cell resides at every intersection of a wordline and a bitline.  It’s the smallest way you can make a memory cell.  Think of the wordlines and bitlines as the wires in a window screen.  If there’s a bit everywhere they cross, then it’s a crosspoint memory.

In most cases a crossbar is a communication path in a computing system.  (Of course, there are exceptions, the main one being a company, Crossbar Inc., that is developing a crosspoint memory technology!) A crossbar communication path is topographically similar to a crosspoint, but its function is to connect a number of memory arrays to a number of processors.  Visualize a vertical column of memory arrays named A, B, C… and a horizontal row of processors named 1, 2, 3… as is illustrated in this post’s graphic.  The crossbar can connect Processor 1 to Memory A, or to any other memory that is not already connected to another processor.  These connections are represented by the circles in the diagram.  You can see that this is an efficient way to allow processors to share a memory space to achieve very high speed inter-processor communications.

Crossbars are quite likely to Continue reading

New Report: 3D XPoint Memory

3D XPoint Report Graphic

Objective Analysis has just introduced a new report that you might want to consider: A Close Look At The Micron/Intel 3D XPoint Memory.

The report covers the Intel-Micron 3D XPoint memory and includes Intel’s new Optane support products that are based on this technology.  The report explains the technology and its special manufacturing challenges.  It includes details of how 3D XPoint memory will be used, and provides an analysis of the benefits of its persistent nature.

Forecasts project how the market will develop and include optimistic and pessimistic forecast scenarios.  Particular attention has been paid to its impact upon the DRAM, SSD, and other markets.  Finally, the report analyzes different end-market segments to predict how this technology will impact each of them.

The Memory Guy, report author Jim Handy, will present the report’s findings during the Pre-Conference Primer of the Storage Network Industry Association (SNIA) Storage Developer Conference (SDC) this Sunday, September 20, at 2:00 PM, In Santa Clara, CA.

This breakthrough report is based on Continue reading

How Many Kinds of Memory Are There?

Micron's History of Memory TechnologiesWith Micron & Intel’s July 28 introduction of their new 3D XPoint memory both companies touted that his is the first new memory in a long time, and that the list of prior new memory types is short.

How short is that list?  Interestingly, Intel and Micron have different lists.  The Micron list, shown in this post’s graphic (click to enlarge), cites seven types: “Ram” (showing a vacuum tube), PROM, SRAM, DRAM, EPROM, NOR flash, and NAND flash.  Intel’s list adds magnetic bubble memory, making it eight.  (Definitions of these names appear in another Memory Guy blog post.)

The Memory Guy finds both lists puzzling in that they left out a number of important technologies.

For example, why did Intel neglect EEPROM, which is still in widespread use?  EEPROMs (or E²PROMs) are not only found in nearly every application that has a serial number (ranging from WiFi routers to credit cards), requires calibration (like blood glucose monitoring strips and printer ink cartridges), or provides operating parameters (i.e. the serial presence detect – SPD – in DRAM DIMMs), but they still ship in the billions of units every year.  In its time EEPROM was an important breakthrough.  Over the years EEPROM has had a much greater impact than has PROM.

And, given that both companies were willing to include tubes, a non-semiconductor technology, why did both Continue reading

Micron/Intel 3D XPoint Raises More Questions than Answers

Micron-Intel 3D XPoint Memory InternalsMicron and Intel hosted an event in San Francisco Tuesday, July 28, to introduce a new memory technology that they have named “3D XPoint”.  This technology was explained to be “up to 1,000 times faster, with 1,000 times the endurance of NAND flash” while being significantly cheaper than DRAM.

Some technical details:

  • 3D XPoint is a “Fundamentally Different Technology” than current memory types.  It’s an ReRAM that uses material property changes for bit storage where both DRAM and NAND use charge to store a bit
  • The chip currently stores 128Gb in two stacked planes of 64Gb each, storing a single bit per cell
    • Today’s densest production NAND flash chips store 128GB by using MLC, so this chip actually has twice as many bit cells as any production NAND flash
    • The companies do not see a clear limit to the number of planes they can stack, but are optimistic about this
  • The bulk mechanism can be used to store multiple bits on a single cell (MLC)
  • Today’s chip is made using a 20nm process, but can scale well past that
    • There is no clear limit of how far the technology can be scaled
  • It’s 1,000 times faster than NAND flash and offers 1,000 times NAND’s endurance
  • It’s 10 times as dense as today’s “Conventional Memory” (which I suppose to be DRAM)
  • This is not intended to replace either NAND or DRAM, but to coexist as a new memory layer between NAND and DRAM

The companies claim that other Continue reading

What Memory Will Intel’s Purley Platform Use?

Part of Intel Purley SlideThere has been quite a lot of interest over the past few days about the apparently-inadvertent disclosure by Intel of its server platform roadmap.  Detailed coverage in The Platform showed a couple of slides with key memory information for the upcoming Purley server platform which will support the Xeon “Skylake” processor family.  (A review of this post on 7/13/17 revealed that The Platform’s website has disappeared.  The above link and the next one no longer work.)

One slide, titled: “Purley: Biggest Platform Advancement Since Nehalem” includes this post’s graphic, which tells of a memory with: “Up to 4x the capacity & lower cost than DRAM, and 500x faster than NAND.”

The Memory Guy puzzled a bit about what this might be.  The only memory chip technology today with a cost structure lower than that of DRAM is NAND flash, and there is unlikely to be any technology within the leaked roadmap’s 2015-2017 time span that will change that.  MRAM, ReRAM, PCM, FRAM, and other technologies can’t beat DRAM’s cost, and will probably take close to a decade to get to that point.

Since that’s the case, then what is this mystery memory?  If we think of Continue reading

Memory Issues in Space & Medical Applications

How an alpha particle disrupts a memory bitThe Memory Guy was recently asked about using memories in a satellite. What would be a good technology to use in a space application?

The problem with space is that there is a lot of radiation.  Radiation on the earth’s surface is lower because it is stopped by the atmosphere, but in space there is an abundance of radiation that interferes with most semiconductors.  Radiation is also a concern in certain medical applications where a memory must maintain its contents while undergoing sterilization through irradiation.  Experiments on conventional flash memories have shown data loss at only 2% of the Continue reading

New Book: Vertical 3D Memory Technologies

Book: Vertical 3D Memory Technologies - Betty PrinceWiley has recently published a new book by Betty Prince titled Vertical 3D NAND Technologies that is one to consider if you want to bring yourself up to speed on recent research behind today’s and tomorrow’s 3D memory technologies.

For those who haven’t previously encountered Dr. Prince, she is the author of a number of key books covering memory design and holds memory patents written over her 30-year career in the field.

The book provides capsule summaries of over 360 papers and articles from scholarly journals on the subject of 3D memories, including DRAM, NAND flash, and stacked chips.

These papers are organized into Continue reading

Fundamentals of Memory – Free Online Course

Fundamentals of Memory Course - EE TimesSome time ago The Memory Guy was asked by Numonyx (later acquired by Micron) to put together an online course for EE Times on memory technologies, explaining how each one works and where it is used.

Although the course was very well received, I never posted a link to it on The Memory Guy blog.  This post is intended to correct that error.

The course runs 75 minutes and covers the basics of DRAM, non-volatile RAM, SRAM, NAND flash, NOR flash, mask ROM, and EEPROM.  It explains each technology’s advances in size, cost and performance, leading up to the development of Continue reading

Contact

Jim Handy Objective Analysis Memory Market Research +1 (408) 356-2549 Jim.Handy (at) Objective-Analysis.com

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