According to a Business Korea article Samsung announced, during a June 14 investor event, plans to reduce its DRAM capital spending and shift its focus to 3D NAND.
The Memory Guy sees this as an unsurprising move. This post’s chart is an estimate of DRAM wafer production from 1991 through 2014. There is a definite downtrend over the past few years. The peak was reached in 2008 at an annual production of slightly below 15 million wafers, with a subsequent dip in 2009 thanks to the global financial collapse at the end of 2008. After a slight recovery in 2010 the industry entered a period of steady decline.
The industry already has more than enough DRAM wafer capacity for the foreseeable future.
Why is this happening? The answer is relatively simple: the gigabytes per wafer on a DRAM wafer are growing faster than the market’s demand for gigabytes.
Let’s dive into that in more detail. The number of gigabytes on a DRAM wafer increases according Continue reading
A very unusual side effect of the move to 3D NAND will be the impact on the equipment market. 3D NAND takes the pressure off of lithographic steps and focuses more attention on deposition and etch. The reason for going to 3D is that it provides a path to higher density memories without requiring lithographic shrinks.
This sounds like bad news for stepper makers like ASML, Canon, and Nikon while it should be a boon to deposition and etch equipment makers like Applied Materials, Tokyo Electron, and Lam Research.
In its summer 2013 V-NAND announcement, Samsung explained that it would be Continue reading
Someone recently asked The Memory Guy to comment on a projection that NAND flash bit consumption was headed into a period of reduced growth. This appears to have stemmed from a comment made by another memory analyst.
This drove me to compile this report’s graphic, which compares historical bit growth for DRAM (bottom, black line) against that of NAND flash (upper red line). Although NAND started out with astronomical annual bit growth of nearly 250%, it declined in 2011 to around 70%. This brings it closer to DRAM’s rate that ranges around 50%.
This is not cause for alarm – when the NAND market was very small bit growth was expected to be high. Large demand upturns could be relatively easily accommodated. Today’s multibillion-dollar capacity additions require more careful planning. This is the Law of Large Numbers.
We are at a point where NAND bit growth will probably settle into a range similar to that of DRAM. Consumption will be limited by economics, since production increases involve huge capital expenditures.
So, in a way, we are more headed out of a period of declining bit growth than going into one.
Over lunch today I had a conversation with an alum of McKinsey Consulting who remarked that the DRAM business behaved in a way that was similar to the McKinsey Steel Model. For those unfamiliar with this model I found a slideshow HERE that refers to it a good deal. (So far I have not found a tutorial on the model itself, but if anyone knows were to find it The Memory Guy would highly appreciate hearing about it.)
One interesting thing is that this particular McKinsey alum was not the first to point this out to me. About 15 years ago a family friend/McKinsey alum told me exactly the same thing. It seems that the economics of the DRAM business have changed little over the past 15 years, and the McKinsey steel model applies to DRAMs just as well now as it did then.
In a nutshell, the model posits that the market price for Continue reading