IBM Jumps on the “New Memory” Bandwagon

IBM's 3-Bit PCM Read AlgorithmAt a technical conference hosted by the IEEE this week IBM announced the results of nearly a decade of research in which its scientists have been investigating the emerging technology known as “Phase Change Memory” (PCM).  The scientists presented a means of successfully storing three bits per cell for the first time, while also addressing all of PCM’s challenging idiosyncrasies, including resistance drift and temperature drift.

Commonly referred to by the erroneous nickname “TLC” for Triple Level Cell, this technology squeezes three bits of data into the space of a single bit, essentially cutting the cost per gigabyte to about one third of that of a standard memory chip making it closer in cost to flash.

With this step IBM expects to help drive a new memory layer into existence, one that will fit between the cheap and slow NAND flash used in SSDs and the fast but expensive DRAM used for main memory.  Such a layer would improve the cost/performance of all types of Continue reading


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