SanDisk

Did Toshiba REALLY Lose 3-6 Weeks’ Production?

Toshiba's Fab 5 in YokkaichiYesterday The Memory Guy learned of an amazing article in DigiTimes about a 3-6 week shutdown at Toshiba’s Yokkaichi NAND flash fab line.  According to the story Toshiba’s production was shut down for 3-6 weeks accounting for a production loss of 100,000 wafers.  Another article in PC Games N converted that to lost bytes and came up with the number 400,000 terabytes.

Some quick math shows the errors in both of these articles.

First of all, the wafer stoppage.  The Toshiba/SanDisk Yokkaichi Joint Venture wafer fabrication complex processes a little over 2 million wafers per year.  Divide that by 52 weeks and you find that’s about 40,000 wafers per week, so 100,000 wafers would be 2.5 weeks’ output, not 3-6 weeks.

The number of bytes that PC Games N published takes a little more math.  According to TechInsights Toshiba’s 15nm 128Gb MLC chip has an area of 99mm².  That gets you a little over 10TB/wafer.  The company’s 48-layer TLC 256Gb part should produce about twice that.  Yet, if you divide PC Games’ Continue reading

3D NAND: “I Have More Layers than You Do!”

Layer CountYesterday’s news really underscored the race currently underway between 3D NAND makers to produce higher layer counts than one another.

Intel produced an announcement in which VP Rob Crooke bragged that: “Intel has delivered the world’s first commercially available 64-layer, TLC, 3D NAND solid state drive (SSD). While others have been talking about it, we have delivered.”

The announcement explained that the new Intel SSD 545s could be purchased at Newegg beginning that day.

The Memory Guy received Intel’s announcement at 10:02 AM Pacific Time.  By 3:11 PM, five hours later, there was another announcement in my “In” box, this time from Western Digital (WDC).

WDC’s e-mail announced the development of the the SanDisk/Toshiba next-generation BiCS4 3D NAND technology, with 96 layers.  The companies expect to begin to sample a 256Gb part to OEM customers in the second half of 2017 with production starting by the end of next year.

One has to wonder if WDC was Continue reading

Samsung Power Glitch – Is It Important?

3D NANDOn Saturday, June 18, Samsung’s Xian fab, the only facility in the world currently producing 3D NAND flash, suffered a power failure.  How much of a problem is this?

The answer really depends upon who you ask.  An article in the Financial Express quoted Samsung as saying that it would have a minimal impact, and that full-scale operations should resume in a few days.  The article also said that Samsung estimated that the wafer loss would be below 10,000 wafers.

Assuming that the entire loss consisted of Samsung’s most advanced 48-layer 256Gb 3D NAND a 10,000-wafer loss would be less than 1% of total industry gigabyte shipments.

Korea Times quoted an anonymous fund manager who said: “The one-time incident will cost Samsung up to 20 billion won, which is very minimal.  It won’t make heavy impact on Samsung’s chip business and the entire industry.”

According to Korean news source Chosenilbo the outage was caused by Continue reading

Flash Memory Summit: Limitless Layers of 3D NAND

SanDisk Technology Roadmap 2014The single most interesting thing I learned at the 2015 Flash Memory Summit was that 3D NAND doesn’t have a natural limit, after which some other memory type will need to be adopted.

For years SanDisk has been presenting a memory roadmap (this post’s graphic is one rendition) that anticipates a move to ReRAM after 3D NAND has run through its natural life, which was expected to be as little as three generations.  This has been backed by the idea that a 3D NAND stack would only be able to reach a certain number of layers before it would encounter difficulties caused by the need to etch a high aspect ratio hole through an increasing number of layers.

The aspect ratio issue is not hard to understand: Let’s assume that the hole in a 24-layer stack has an aspect ratio of 40:1, then a 32-layer hole would have an aspect ratio of about 50:1, and a 64-layer stack would be something close to 100:1.  Today’s technology starts to have trouble etching holes with an aspect ratio higher than 60:1.

These high aspect ratios were thought to be the limiting factor that would prevent 3D NAND from continuing for more than three generations.  3D NAND could only have as many layers as the aspect ratio could support.

On a panel that I moderated at this year’s Flash Memory Summit one panelist, Dr. Myoung Kwan Cho of SK hynix, explained that although there is a limit Continue reading

What Memory Will Intel’s Purley Platform Use?

Part of Intel Purley SlideThere has been quite a lot of interest over the past few days about the apparently-inadvertent disclosure by Intel of its server platform roadmap.  Detailed coverage in The Platform showed a couple of slides with key memory information for the upcoming Purley server platform which will support the Xeon “Skylake” processor family.  (A review of this post on 7/13/17 revealed that The Platform’s website has disappeared.  The above link and the next one no longer work.)

One slide, titled: “Purley: Biggest Platform Advancement Since Nehalem” includes this post’s graphic, which tells of a memory with: “Up to 4x the capacity & lower cost than DRAM, and 500x faster than NAND.”

The Memory Guy puzzled a bit about what this might be.  The only memory chip technology today with a cost structure lower than that of DRAM is NAND flash, and there is unlikely to be any technology within the leaked roadmap’s 2015-2017 time span that will change that.  MRAM, ReRAM, PCM, FRAM, and other technologies can’t beat DRAM’s cost, and will probably take close to a decade to get to that point.

Since that’s the case, then what is this mystery memory?  If we think of Continue reading

Four New Players Join 3D NAND Market

Micron & Intel's 3D NAND Die PhotoThe following is excerpted from an Objective Analysis Alert sent to our clients on March 26: On March 25 SanDisk and Toshiba announced sampling of their 3D NAND flash technology, a 128Gb (gigabit) 48-layer second-generation product based on the BiCS technology that the companies pioneered in 2007.  Pilot production will begin in the second half of 2015 with meaningful production targeted for 2016. This release was issued at the same time that Intel and Micron were briefing the press and analysts for their March 26 announcement of their own 3D NAND offering (pictured), which is currently sampling with select customers, and is to enter full production by year-end.  The Micron-Intel chip is a 32-layer 256Gb device, which the companies proudly point out is the densest flash chip in the industry.

Similarities and Differences

These two joint ventures (Intel-Micron and SanDisk-Toshiba) are taking very different Continue reading

NAND Sourcing Changes as Supplies Tighten

A Pile of ChipsLast week Micron and IBM announced that Micron would be IBM’s main supplier of NAND flash chips.  The week before Micron announced a strategic agreement with Seagate to supply NAND flash. Why all this activity?

It comes down to today’s budding NAND flash shortage and the fact that suppliers tend to groom their customer lists when supplies get short.

Neither IBM nor Seagate represent the enormous opportunities that major consumer electronics firms like Apple do.  Since many NAND suppliers are very cost-focused they look for customers that need very little support and purchase in high volumes.

IBM and Seagate look for a lot of support, and, since they both ship mostly enterprise flash systems or SSDs, they consume relatively small unit volumes of NAND flash chips.

These companies need to have an understanding of Continue reading

Obama Honors SanDisk Co-Founder

Eli Harari Receiving National Medal of Technology and Innovation. Photo Credit: Ryan K Morris and the National Science and Technology Medals FoundationSanDisk co-founder Eli Harari was awarded the National Medal of Technology and Innovation on November 20 by President Obama.  The medal, which was bestowed upon Dr. Harari in a White House ceremony, is the United States’ highest honor for scientific and technological achievement, and  recognizes those whose lasting contributions have created a greater understanding of the world and improved the lives of many.

Harari co-founded SanDisk more that 25 years ago with the vision that flash memory would be used to store data in mobile products, a vision that initially took seed in photography in the 1990s, and has since become the fastest-growing Continue reading

SanDisk’s Amazing 512GB SD Card

SanDisk's 512GB SD CardSanDisk has introduced an SD Card with a whopping 512 gigabytes of storage.  Noting that SD Card capacities have increased by 1,000 times over the past ten years, from 512MB to 512GB, the company says that this product is aimed at professional HD videographers (who can justify its $800 price) allowing them to shoot Raw-format footage without shutting their cameras off, which could potentially allow them to miss a magic moment.

To The Memory Guy this represents an amazing piece of packaging technology.  Let’s see why:

In 2003 SanDisk’s 512MB card contained Continue reading

Why NAND is So Difficult to Scale

ASML chart chowing the lithography used for 4X, 3X, 2X, and 1Xnm planar NAND and 3D NANDNAND flash is the process leader in memory technology, and this puts it in a very challenging position: It must ramp to high volume production using techniques that have never been tried before.

The graphic for this post (click to enlarge), supplied by ASML, the semiconductor industry’s leading lithography tool supplier, illustrates the challenge of migrating from one process node to the next.  Across the bottom, on the X-axis, are representative process nodes ranging from “2D-45”, or two-dimensional (planar) 45nm NAND, to “3D-5x”, or three-dimensional 5xnm NAND.  Below these numbers are the year of volume production.

The vertical axis, labeled “Tolerance” represents the minimum Continue reading

Contact

Jim Handy Objective Analysis Memory Market Research +1 (408) 356-2549 Jim.Handy (at) Objective-Analysis.com

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