STT

Why ST-MRAMs Need Specialized DDR3 Controllers

Everspin ST-MRAM press photoEverspin and Northwest Logic have just announced full interoperability between Northwest Logic’s MRAM Controller Core and Everspin Technologies’ ST-MRAM (Spin-Torque Magnetic RAM) chips. This interoperability is hardware proven on a Xilinx Virtex-7 FPGA and is now available for designs needing low-latency, high memory throughput using MRAM technology.

Since The Memory Guy knew that Everspin’s EMD3D064M ST-MRAM was fully DDR3 compatible, I had to wonder why the part would require a special controller – couldn’t it simply be controlled by any DDR3 controller?

Everspin’s product marketing director, Joe O’Hare, took the time to Continue reading

Memory Issues in Space & Medical Applications

How an alpha particle disrupts a memory bitThe Memory Guy was recently asked about using memories in a satellite. What would be a good technology to use in a space application?

The problem with space is that there is a lot of radiation.  Radiation on the earth’s surface is lower because it is stopped by the atmosphere, but in space there is an abundance of radiation that interferes with most semiconductors.  Radiation is also a concern in certain medical applications where a memory must maintain its contents while undergoing sterilization through irradiation.  Experiments on conventional flash memories have shown data loss at only 2% of the Continue reading

Fundamentals of Memory – Free Online Course

Fundamentals of Memory Course - EE TimesSome time ago The Memory Guy was asked by Numonyx (later acquired by Micron) to put together an online course for EE Times on memory technologies, explaining how each one works and where it is used.

Although the course was very well received, I never posted a link to it on The Memory Guy blog.  This post is intended to correct that error.

The course runs 75 minutes and covers the basics of DRAM, non-volatile RAM, SRAM, NAND flash, NOR flash, mask ROM, and EEPROM.  It explains each technology’s advances in size, cost and performance, leading up to the development of Continue reading

Everspin Samples First STT MRAM

Everspin today announced that select customers have been sampled the world’s first “ST-RAM” a 64Mb chip using STT MRAM technology, rather than Everspin’s existing production toggle MRAM technology.

For the past decade or so memory researchers have been looking to Spin Transfer Torque (sometimes called “Spin Torque Transfer”) MRAMs as a way of getting to tighter processes than conventional toggle MRAM.  It seems that current densities in toggle MRAM rise too high as the process shrinks – at some point the process could no longer scale since chips would burn themselves out during programming.  The ST-RAM paves Everspin’s path toward Continue reading

The End of Flash Scaling

The End is at Hand for NAND Flash ScalingEveryone knows that flash memory is about to hit its scaling limit – it’s right around the corner.  We’re ready for it because it’s been right around the corner for more than a decade now.  It’s so close we can taste it.

When will it happen?

One thing that is quite clear is that nobody knows when NAND flash will stop scaling.  Everyone knows that it’s soon, but researchers continue to find ways to push the technology another couple of process nodes past where anyone thought it could possibly go, and they have been doing this since Continue reading

IEEE Spectrum: Did Bad Memory Chips Down Russia’s Mars Probe?

Radiation SymbolThe IEEE Spectrum published an interesting article postulating that Russia’s recently-failed Mars probe may have suffered from bad memory chips.  According to the Spectrum article the Russian government’s Official Accident Investigation Results faulted SRAMs:

The report blames the loss of the probe on memory chips that became fatally damaged by cosmic rays.

Both the main computer and the backup computer seem to have failed at the same time, Continue reading

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Jim Handy Objective Analysis Memory Market Research +1 (408) 356-2549 Jim.Handy (at) Objective-Analysis.com

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