At a technical conference hosted by the IEEE this week IBM announced the results of nearly a decade of research in which its scientists have been investigating the emerging technology known as “Phase Change Memory” (PCM). The scientists presented a means of successfully storing three bits per cell for the first time, while also addressing all of PCM’s challenging idiosyncrasies, including resistance drift and temperature drift.
Commonly referred to by the erroneous nickname “TLC” for Triple Level Cell, this technology squeezes three bits of data into the space of a single bit, essentially cutting the cost per gigabyte to about one third of that of a standard memory chip making it closer in cost to flash.
With this step IBM expects to help drive a new memory layer into existence, one that will fit between the cheap and slow NAND flash used in SSDs and the fast but expensive DRAM used for main memory. Such a layer would improve the cost/performance of all types of Continue reading
An article in a recent issue of Business Korea posits that Apple may be having trouble stemming from the company’s adoption of TLC flash in it’s new iPhone 6.
The article states:
considering that technical defects mainly occur in the 128GB version of the iPhone 6 Plus, there might be a problem in the controller IC of triple-level cell (TLC) NAND flash.
The problem has led to numerous warranty replacements and the looming prospects of a recall.
(Note that Continue reading
For those who were unable to attend the Flash Memory Summit, Samsung’s Senior VP of Memory R&D, Bob Brennan, announced in his keynote speech that a 3D 32-layer V-NAND, a chip that would achieve twice the chip density of planar NAND, was entering production and that SSDs would follow in a month. Now, two months later, Samsung has announced those SSDs.
This week’s release reiterates Continue reading
The answer is: “There is no such thing: It’s a misstatement.”
The term “MLC” has, by a number of people, been mistranslated to “multi-layer cell.” The misunderstanding appears to have originated in the financial community. People in the flash memory business never use the term at all.
Yes, we talk about MLC, but to us the term means “multilevel cell”.
A multilevel cell is a cell that uses varying voltage levels to represent different states. With four voltage levels the resulting four states on a single cell can be turned into Continue reading
DensBits, an Israeli start-up, has introduced a new technology and a new product today. The company’s new eMMC controller, the DB3610, embodies DensBits’ “Memory Modem” technology, which is a blend of ECC, DSP, and flash management that the company says can give TLC flash endurance superior to that of MLC flash with performance nearly as good as competing controllers can provide with MLC.
That’s a big claim!
DensBits’ Memory Modem views NAND flash as a noisy communications channel, using those algorithms developed to support deep Continue reading
One memory chip was so important that it was presented three times at this week’s International Solid State Circuits Conference (ISSCC) and that was the Toshiba/SanDisk 128Gb NAND flash. This chip was shown by Eli Harari in Monday’s keynote, then was featured twice in the Wednesday afternoon Nonvolatile Memories session – once by Toshiba and once by SanDisk.
The NAND chip, measuring 170.6mm², is said by both companies to be the densest NAND available. Compared to the Intel/Micron 64Gb 20nm NAND at 118mm², the device gives twice the bits in a 45% larger die area, so the companies’ claim rings true, since the only other NAND makers: Samsung and Hynix, have processes that fall far behind at 27nm and 26nm respectively.