January 2018 – The Memory Guy Blog

Amazing 3D NAND Video

Chip reverse-engineering consultant Dick James pointed The Memory Guy to an absolutely amazing 25-second video of a 3D NAND chip. The video’s made by the Carl Zeiss company. It’s the second one from the top on this page: https://www.zeiss.com/semiconductor-manufacturing-technology/products-solutions/process-control-solutions/crossbeam-fib-sem.html

The video zooms around a portion of a 3D NAND die as layers are etched away and then restored. Only the tungsten parts of the chip are shown, with the rest appearing to be empty space. This serves to clarify it a good bit. Dick James says that this makes it the equivalent of a 3D x-ray tomograph.

It’s a promotional piece for a Zeiss tool called the “Crossbeam FIB-SEM” that can both image and mill a chip.

Now I doubt that most Memory Guy readers would have a need for this tool, nor be able to afford something which is doubtlessly very expensive, but I am sure that anyone would admire what it can do. I certainly find it to be impressive!

Naturally, Dick James was able to identify the chip just by looking at it. He says that it’s Samsung’s 32-layer part.

Original PCM Article from 1970

For a number of years The Memory Guy has wanted to find a copy of the 1970 article, published in Electronics magazine, in which Intel’s Gordon Moore and two authors from Energy Conversion Devices, Ron Neale and D.L. Nelson, showed that PCM could be used as a memory device. After all, this is the technology behind Micron & Intel’s 3D XPoint Memory.

The cover of the magazine (this post’s graphic) has been used by Intel to promote its PCM or PRAM chips before those were spun off to Numonyx (now a part of Micron). Intel, though, didn’t appear to have anything to share but the cover photo.

Electronics magazine went out of business in 1995, and that makes the task of finding archive copies more challenging.

It recently occurred to me that the best person to ask might be the article’s lead author, Ron Neale, who has been a regular contributor to EE Times and who now also contributes blog posts to The Memory Guy.

I was astounded to discover that Continue reading “Original PCM Article from 1970”

Micron and Intel to End NAND Flash JV

It came as a surprise to the Memory Guy on Monday to receive a press release from Micron indicating that Intel and Micron had decided to end their NAND flash partnership.

This agreement, which was begun in 2006, helped the two companies to aggressively ramp into the NAND flash market by combining their resources. NAND flash makers (as well as DRAM makers) need to make very substantial capital investments to participate in the market, and that’s not easy for a new entrant. Micron at that time was a very small NAND flash maker, and Intel wasn’t involved in the NAND flash market at all, so neither was in a position to succeed. By combining their resources the companies were able to become important contributors to the market.

The agreement initially appeared to be modeled after the very successful joint venture that Toshiba and SanDisk enjoyed. Each company would contribute half of the JV’s capital investment, and the same designs would be used to make both companies’ chips.

Over time Intel found itself in a familiar Continue reading “Micron and Intel to End NAND Flash JV”

How 3D NAND Shrinks ECC Requirements

Error Correction Codes, ECC, are not only important to today’s NAND flash market, but they have been a cause of concern to NAND users for a number of years. The Memory Guy has been intending for some time to write a low-level primer on ECC, and I am finally getting it done!

Why is ECC necessary on NAND flash, yet it’s not used for other memory technologies? The simple answer is that NAND’s purpose is to be the absolute cheapest memory on the market, and one way to achieve the lowest-possible cost is to relax the standards for data integrity — to allow bit errors every so often. This technique has been used for a long time in both communications channels and in hard disk drives. Data communication systems can transfer more data using less bandwidth and a weaker signal over longer distances if they use error correction to restore distorted data. Hard disk drives can pack more bits onto a platter if the bits don’t all have to work right. These markets (and probably certain others) have invested a lot of money in ECC research and development, and as a result ECC today is a very well-developed science.

Denali Software published a nice Continue reading “How 3D NAND Shrinks ECC Requirements”