Monthly Archives: April 2019

96-Layer NAND in Perspective: WDC Video

WDC 96-Layer NAND Model with The Memory GuyIt’s pretty easy to go from talking about the earliest 24-layer 3D NAND to talking about the next-generation 32-layer 3D NAND, and then to progress through 48, 64, and more layers, but the amazing scale of a 96-layer part doesn’t really sink in when you just talk about numbers.

That’s why The Memory Guy was so charmed when Western Digital Corp. (WDC) invited me in for a briefing that gave me a more solid idea of how significant of a number 96 really is.  The company brought along a plastic model that replicated the structure of its 96-layer BiCS NAND chip using clear plastic which was dramatically lighted from the inside.

WDC’s model was constructed using standard plastic sheeting, probably 1/8″ thick (~3mm), one sheet to represent the conductive polysilicon and one to represent the insulating silicon dioxide for each layer.  Naturally, there are more than 96 layers in 96-layer NAND since there are source select transistors at the bottom and drain select transistors at the top.  This adds a little bit to the layer count.

Another layer in the middle of Continue reading

What’s Inside an Optane DIMM?

Part of Optane DIMM LogoWith the release of its Cascade Lake family of processors today (formally called the “2nd Generation Intel Xeon Scalable processor”) Intel disclosed more details about its Optane DIMM, which has been officially named the “Intel Optane DC Persistent Memory.”  This DIMM’s architecture is surprisingly similar to an SSD, even to the point of its having error correction and encryption!

The Memory Guy doesn’t generally cover SSDs, but I do cover DIMMs, so this is one of those posts that I could have put into either of my blogs: The Memory Guy or The SSD Guy.  I have decided to put it here with the hopes that it will be easier for members of the memory community to find.

The internal error correction, the encryption, and the fact that 3D XPoint Memory wears out and must use wear leveling, all cause the Optane DIMM’s critical timing path to be slower than the critical path in a DRAM DIMM, rendering the Optane DIMM unsuitable for code execution.  This, and the fact that XPoint writes are slower than its reads, all help to explain why an Optane DIMM is never used as the only memory in a system: there is always a DRAM alongside the Optane DIMM to provide faster Continue reading

MRAMs to Power Cell Phones

Spin i Reversed Below the EquatorThe Memory Guy today became aware of a significant breakthrough in magnetic memory technologies (MRAM) that could prove to be a big bonus for mobile applications.  These memories could be used to generate power as well as to store data.

Scientists have only recently become aware of an oversight stemming from the fact that nearly all spin magnetics research has been performed in the northern hemisphere.  Just as the water in a drain rotates counterclockwise in the northern hemisphere but clockwise in the southern hemisphere, the Coriolis Effect dictates that magnetic spin has the opposite sense above the equator as below.

This surprise finding was made when researchers from Stüdpfalz University of Blindman’s Bluff, Iowa, brought samples of an STT MRAM they had developed to the Townsville City Metropolitan University in Queensland, Australia, where researchers have been producing similar magnetic memories below the equator.  Until that moment neither team had thought to question the Continue reading