I attended a bit of the SPIE Advanced Lithography conference in San Jose this week. This show is different from my normal fare, since The Memory Guy isn’t all that smart with process technology. Still, there were certain aspects that I wanted to see. Surprisingly, none of the presentations that I attended related directly to lithography: Two were about Continue reading “SPIE Advanced Litho Conference: Artificial Intelligence and a Lot of Chemistry”
In this post contributor Ron Neale looks deeper into a paper delivered by CEA-Leti at December’s 2019 IEDM conference, evaluating its fundamental thesis that an OTS selector is suitable for high-density memory arrays. Another interesting aspect of this same paper was the subject of an earlier post.
One eye catcher at IEDM 2019 was a paper from a team in France at CEA-Leti, Minatec, Grenoble, IMEP LAHC CNRS and INL CNRS, INSA Lyon, by D. Alfaro Robayo et al titled: Reliability and Variability of 1S1R OxRAM-OTS for High Density Crossbar Integration. I discussed another aspect of Continue reading “Chalcogenide Selectors and Oxide Memory Move Towards 1Gbit”
On January 22 Processor-In-Memory (PIM) maker UPMEM announced what the company claims are: “The first silicon-based PIM benchmarks.” These benchmarks indicate that a Xeon server that has been equipped with UPMEM’s PIM DIMM can perform eleven times as many five-word string searches through 128GB of DRAM in a given amount of time as the Xeon processor can perform on its own. The company tells us that this provides significant energy savings: the server consumes only one sixth the energy of a standard system. By using algorithms that have been optimized for parallel processing UPMEM claims to be able to process these searches up to 35 times as quickly as a conventional system.
Furthermore, the same system with an UPMEM PIM is said to Continue reading “UPMEM Releases Processor-In-Memory Benchmark Results”