About Jim Handy

Jim Handy, a well-known semiconductor industry analyst, began his career in design and marketing positions at leading technology firms including National Semiconductor, Intel and Siemens.  He earned his strong reputation through his groundbreaking work as an industry analyst for Dataquest (now Gartner) and Semico Research.

He is a Leader in the Gerson Lehrman Group, and is on the Advisory Board of the Flash Memory Summit.

Mr. Handy has written hundreds of articles, white papers, and in-depth reports for trade journals and market research firms.  He is often quoted in the electronics press, presents frequently at trade shows,  and is known for his high level of industry presence and volume of publication.

Handy’s strong technical and business background includes a Bachelor’s degree in Electrical Engineering from Georgia Tech and an MBA from the University of Phoenix.  He is the author of “The Cache Memory Book” (Harcourt Brace, 1993), the leading reference in the field and is a patent holder in the field of cache memory design.  He has performed rigorous technical analysis on the elasticity and pricing dynamics of technology markets which has debunked some widely held theories to unveil the true motivators of the market’s behavior.

More on Mr. Handy’s background can be found at the Objective Analysis website: www.Objective-Analysis.com

13 thoughts on “About Jim Handy”

  1. Hi Jim:
    I’m a reader from Shanghai China, I’m a firmware engineer for SSD.
    It’s the first time I touch with “the memory guy”, it’s very good, I can get a lot of information here.

    I have a suggestion, in China, the IM “WeChat” is very popular, and there are a lot of engineers in shanghai and working for NAN like SSD, eMMC. So if you can consider to build a new option on WeChat, it will be very good for China guys to read and comment and study with the memory guy.


  2. Hello Jim Handy,
    I am a frequent reader of your topics , each time i reads, finds several new things. Further i need some help of yours if you are able to, then am thankful to you. I am planning to start manufacturing of Memories in India ,for which i need your help, can u?

    Rohit Kadecha

  3. Hi, great content going back sooo far!
    I wonder if you have some data on past memory industry capex?
    17-18 seems like gigantic building years, I have been thinking, how much of the industry’s revenue is spent as capex each year, and if that is at all useful to predict the future memory price.
    Great work, keep it up!

    1. Yaokai,

      You are correct: CapEx provides a wonderful predictor of market cycles. We have built a very accurate forecast model based on this. Have a look at Slide 3 of my market update session at last August’s Flash Memory Summit:


      I am sorry to say that CapEx history is not something provided by Objective Analysis. When we need such numbers we go to VLSI Research, who has a long presence in Semiconductors and has been tracking CapEx for decades.

      Thanks for the comment,


  4. Can you tell me the names of manufacturers (as opposed to “re-labelers”) of DDR4 RDIMMs (288 pin)?

    I need to buy a number of these and am having some challenges identifying actual producers.

    Thanks for any help you can provide.

    K B
    for ViON Corporation

    1. Karl,

      I don’t track specific form factors, but in general you can get DIMMs from the chip makers that are actually produced by them: Samsung, SK hynix, and Micron.

      Leading module makers also produce their own DIMMs: Kingston, Acer, ATP, Viking, Ma Labs, and Netlist are some that come to mind.

      Hope that helps.


  5. Jim,

    Artificial Intelligence is going to require the fastest memory possible to truly become what it is capable of becoming. With this in mind, what companies are leading the technological charge to improve, drastically improve memory chips in the Artificial Intelligence area?

    1. There really isn’t any memory technology that is AI specific. The way memory economics work, dedicated memories don’t usually make sense to introduce. These chips have to be designed to reach the largest possible audience so that their volume is high enough to drive prices to the lowest level.

      Certain AI systems are based on GPUs, and those GPUs use HBM (high-bandwidth memory) but that’s as close as anyone gets to what you’re thinking of.


  6. Jim

    You noted Zeno’s cunning SRAM back in 2016. They’ve apparently moved it to the 14/16 nm node with some success, and were talking (in 2018) about moving to 7 nm.

    At 14/16nm they’re no smaller than today’s (2021) 5nm bitcell.

    Any opinions on who’s picking this IP up, where it’s being used, and future possibilities with it?

    — P

    1. Pete,

      I talked with Zeno and posted a reply to your question on the post itself.

      If anyone wants to see all of this, they can enter Zeno’s name in the search bar in the upper right corner of this page.


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