Perhaps the oldest nonvolatile semiconductor memory type is the ferroelectric memory, which recently celebrated its 68th birthday. FRAM predates flash memory, EEPROM, and even UV-erasable EPROM. It’s even older than mask ROM, which wasn’t invented until 1967!
As a matter of introduction to the technology, FRAM, or ferroelectric memory, is a read/write nonvolatile memory technology that performs significantly better than Continue reading “FRAM Turns 68”
In a May 15 press release SIA president & CEO John Neuffer said something that definitely bears repeating.
His statement was the Semiconductor Industry Association’s response to new US Department of Commerce rule changes designed to stop: “Huawei’s efforts to undermine US export controls.”
Recall that the SIA is the Continue reading “SIA CEO’s Priceless Comment”
The Memory Guy is pleased to announce the release of a new report co-authored by Objective Analysis and Coughlin Associates named: Emerging Memories Find Their Direction. In this report we show that emerging memories, MRAM, ReRAM, 3D XPoint, and other technologies are well on their way to reach $36 billion of combined revenues by 2030.
The report provides invaluable guidance to Continue reading “Emerging Memory Market to Hit $36 Billion by 2030”
A couple of weeks ago NAND flash start-up YMTC announced the production release of its 128-layer 1.33 terabit QLC NAND flash chip. According to a DigiTimes article about the chip the company plans to claim a share of 8% of the global NAND flash market in 2021.
A number of my clients asked The Memory Guy about this, since YMTC doesn’t yet seem Continue reading “Can YMTC Really Win 8% of 2021’s NAND Flash Market?”
Forecasting the memory market can be quite daunting unless you use the appropriate tools, then it becomes enormously simple. Many of my clients ask The Memory Guy how it is that I am able to come up with such consistently-acurate forecasts in a seemingly-unpredictable market. My answer is always that I use the Smith Chart. This chart is a nomogram, presented in an angular/logarithmic format (as opposed to Continue reading “Forecasting with Smith Charts”
About a year ago a rumor was circulating that Samsung was unable to yield its sub-20nm products without using EUV for the finer processes. Since The Memory Guy doesn’t traffic in rumors I did not publish anything about this rumor at the time.
On March 25 the company verified the rumor, though, by issuing a statement that: “Samsung is the first to adopt EUV in DRAM production.” I found it interesting that the company turned something that was Continue reading “Samsung Admits to Needing EUV for Sub-20nm Nodes”
Today is March 16, 2020, and the US stock market is still trying to understand what is happening with the global Coronavirus Pandemic, having lost nearly 20% of its value over the past week. Cooling-off periods (also called “Circuit Breakers”) automatically stopped overheated trading three times today, and numerous other times last week.
Market indexes fell sharply, as is evident in the following chart from Google Finance which shows Continue reading “COVID-19’s Impact on the Semiconductor Market”
Contributor Ron Neale joins us again to review a paper delivered at last December’s IEDM conference by John Moores & Cambridge Universities, IMEC, and the University of Wuhan. While the main focus of the paper is on PCM endurance improvements, it also provides some new inputs, which, with some suggested additions of Neale’s own, might now provide a unified explanation of threshold switching in the chalcogenides. Neale includes discussions of these new ideas with one of the paper’s authors.
One of the most interesting papers at the recent IEDM was presented by a team at: John Moores University Liverpool, and Cambridge University, UK, IMEC, Belgium and the University of Wuhan, China. As its title makes clear, this research has an important target of Continue reading “NVM Selectors: A Unified Explanation of Threshold Switching”
I attended a bit of the SPIE Advanced Lithography conference in San Jose this week. This show is different from my normal fare, since The Memory Guy isn’t all that smart with process technology. Still, there were certain aspects that I wanted to see. Surprisingly, none of the presentations that I attended related directly to lithography: Two were about Continue reading “SPIE Advanced Litho Conference: Artificial Intelligence and a Lot of Chemistry”
In this post contributor Ron Neale looks deeper into a paper delivered by CEA-Leti at December’s 2019 IEDM conference, evaluating its fundamental thesis that an OTS selector is suitable for high-density memory arrays. Another interesting aspect of this same paper was the subject of an earlier post.
One eye catcher at IEDM 2019 was a paper from a team in France at CEA-Leti, Minatec, Grenoble, IMEP LAHC CNRS and INL CNRS, INSA Lyon, by D. Alfaro Robayo et al titled: Reliability and Variability of 1S1R OxRAM-OTS for High Density Crossbar Integration. I discussed another aspect of Continue reading “Chalcogenide Selectors and Oxide Memory Move Towards 1Gbit”