The Memory Guy will be speaking at SEMICON West. Perhaps I will meet one or more readers there.
My presentation is Monday, July 8, at 3:55-4:25 in the 2019 SEMI Market Symposium. I will be one of eight speakers who will provide our outlooks of the chip market. All of my co-presenters are well known in their fields and will doubtlessly provide valuable insights on what tomorrow has to offer.
My presentation will be a rapid-fire onslaught of valuable information proving that certain outcomes are nearly inevitable and showing how they should evolve over time.
I will specifically discuss today’s down-cycle, the end of More’s Law, semiconductor process changes, including materials and production technologies, changes in end-use architectures (and the impact they will have), the imporatance of new end markets like 5G, and geographical and political issues, especially those dealing with today’s US/China trade war.
The semiconductor industry is in the early stages of Continue reading “SEMICON West: See Me There”
The Memory Guy recently received a question asking where to find Gordon Moore’s famous paper on Moore’s Law. It seems that Moore’s seminal 1965 article is not very easy to find on the web.
I did a little digging myself and found a copy for ready download. It’s still good reading. The Computer History Museum gives access to the original 1965 article. This page also features a follow-up article written ten years later in 1975, and a 1995 thirty-year review of the phenomenon.
All are worth reading.
Back in 2010 I was able to attend the International Solid State Circuits Conference (ISSCC) in which Moore presented a keynote speech that looked back from an even more distant perspective. A little digging found this presentation on The Engineering and Technology History Wiki in the form of a script and downloadable slides. The presentation is titled “No Exponential is Forever“. Although I know that Continue reading “Gordon Moore’s Original 1965 Article”
With Intel’s Cascade Lake rollout last month came with a co-introduction of 3D XPoint Memory in a DIMM form factor, the Optane DIMM that had been promised since the first introduction of 3D XPoint Memory in mid-2015. A lot of benchmarks were provided to make the case for using Optane DIMMs (formally known as the Intel Optane DC Persistent Memory), but not much was said about the pricing, except for assertions that significant savings were possible when Optane was used to replace some of the DRAM in a large computing system.
So… How much does it cost? Well certain technical reports in resources like Anandtech probed sales channels to see what they could find, but The Memory Guy learned that the presentations Intel made to the press in advance of the Cascade Lake rollout contained not only prices for the three Optane DIMM densities (128, 256, & 512GB), but also provided the prices of the DRAM DIMMs that they were being compared against. I’ll get to that in a moment, but first let’s wade through the fundamentals of Intel’s Optane pricing strategy to understand why Intel has needs to price it the way that it has.
In Objective Analysis’ report on 3D XPoint Memory, and in several presentations I have Continue reading “Intel’s Optane DIMM Price Model”
In early February the Samsung Strategy & Innovation Center asked for The Memory Guy to present an outlook for semiconductors as a part of the company’s Samsung Forum series.
Samsung kindly posted a video of this presentation on-line for anyone to watch.
Naturally, the presentation is memory-focused since it consists of the Memory Guy presenting to the world’s leading memory chip supplier. Still, it also covers total semiconductor revenues and demand drivers for future non-memory technologies, as well as memory chips.
During the presentation I explained that the next few years will bring semiconductors into new applications while chips will maintain their strength in existing markets. I showed how semiconductor demand doesn’t change much over time, but that the real swing factor in chip revenues is Continue reading “Video: What’s Driving Tomorrow’s Semiconductors?”
It’s the time of year for Objective Analysis to release its 2019 forecast. What does next year promise?
Every year VLSI Research invites us to produce a video of our semiconductor revenue forecast for the coming year. Since we have been doing this for a number of years there are now twelve videos on the VLSI Research “WeSRCH” website. The latest video can be viewed by clicking on this link.
We’re proud of our record of semiconductor forecasts. While other market research companies dislike discussing their past successes and failures, Objective Analysis puts all of our historical forecasts online in one simple table on our website’s Forecast Accuracy page. A careful review reveals a stellar track record, with the exception of 2009 and 2015, both of which were related to major macroeconomic events that even leading world economists failed to predict (i.e. the 2008 Global Economic Collapse and the combined China currency devaluation and oil price collapse in 2014.)
Another important factor in the Objective Analysis forecast methodology is that we only update the forecast once a year. Our clients dislike being told one thing at the beginning of the year and something completely different at year-end. If the forecast is Continue reading “The Objective Analysis 2019 Chip Forecast”
Why has Intel’s NVM Solutions Group (NSG), the owner of the company’s NAND flash, SSD, and 3D XPoint businesses, been losing money during a time when all other manufacturers are more profitable than they have been in years?
This is a question that certain investors have put to The Memory Guy for the past year or so, and it deserves some explanation.
This post’s graphic compares Intel’s NSG net profit margins to the margins published by other memory companies. (Click on it to see the whole chart.) This isn’t a completely clean comparison since the data for Samsung, SK hynix, and Micron includes DRAM, and recent quarters are missing for Western Digital (SanDisk) and Toshiba since these companies have stopped sharing comparable financials, but it still serves as a relatively clear indication that Intel’s NSG (blue) is losing money while all other companies are quite profitable.
Something seems dreadfully Continue reading “Intel’s Losses Amid Others’ Gains”
With all the new emerging memories that are being developed there must be quite a number of test runs to study exactly how well these new technologies and materials can perform. If a batch of 300mm wafers must be used for a single test then the cost multiplies, particularly if no other test can be run on that wafer.
Another great difficulty is that most memory manufacturers run their wafers on very high-efficiency and high-volume wafer fabs. It is perilous and wasteful to interrupt a production process to inject a batch of test wafers. Most fab managers would rather have a tooth pulled than to change their flow to accept an experimental lot.
What can be done to improve this situation?
Well the folks at Intermolecular, Inc. (IMI) explained to the Memory Guy that they have a solution: They have built a small fab that allows single wafers to be processed with varying parameters across a single wafer. In this way one wafer can be used to run 36 or more different experiments all at the same time. This is clearly more economical than having to run the experiment on 36 wafers or, even worse, 36 batches of wafers! Intermolecular says that, while production fabs are optimized for manufacturing, their fab is optimized for materials understanding.
The firm calls itself an Continue reading “Accelerating New Memory Materials Research”
There’s never been a more exciting time for emerging memory technologies. New memory types like PCM, MRAM, ReRAM, FRAM, and others have been waiting patiently, sometimes for decades, for an opportunity to make a sizeable markets of their own. Today it appears that their opportunity is very near.
Some of these memory types are already being manufactured in volume, and the established niches that these chips sell into can provide good revenue. But the market is poised to experience a very dramatic upturn as advanced logic processing nodes drive sophisticated processors and ASICs to adopt emerging persistent memory technologies. Meanwhile Intel has started to aggressively promote its new 3D XPoint memory for use as a persistent (nonvolatile) memory layer for advanced computing. It’s no wonder that SNIA, JEDEC, and other standards bodies, along with the Linux community and major software firms are working hard to implement the necessary standards and ecosystems to support widespread adoption of the persistent nature of these new technologies.
This post introduces a Continue reading “Emerging Memories Today: New Blog Series”
It’s earnings call season, and we have heard of a slowing DRAM market and NAND flash price declines from Micron, SK hynix, Intel, and now Samsung. DRAM prices have stopped increasing, and that can be viewed as a precursor to a price decline.
Samsung’s 31 October, 2018 3Q18 earnings call vindicated Objective Analysis‘ forecast for a 2H18 downturn in memories that will take the rest of the semiconductor market with it.
Those familiar with our forecast know that for a few years we have been predicting a downturn in the second half of this year as NAND flash prices fall, followed by a DRAM price collapse. After the DRAM collapse the rest of the semiconductor market will undergo a downturn.
We’ve been calling for this downturn for some time. Dan Hutcheson at VLSI Research has been videotaping our forecast every December for the past Continue reading “Memory Market Falling, as Predicted”
Many readers have probably wondered why NAND flash fabs are so enormous. Although DRAM fabs used to be the largest, running around 60,000 wafers per month, NAND flash fabs now put that number to shame, running anywhere from 100,000-300,000 wafers per month. Why are they so huge?
The reason is that you need to run that many wafers to reach the optimum equipment balance. The equipment must be balanced or some of it will be sitting idle, and with some tools costing $50 million (immersion scanners) you want to minimize their idle time to the smallest possible number. I am sure that this is a tough problem, although I have never had to solve it myself.
The most important reason that so much attention is focused on this is that the cost of the wafer depends on the efficiency of the fab. If you built a $13 billion NAND flash fab that produced 90,000 wafers per month instead of 100,000 wafers per month, then the amount of investment per wafer would be 10% higher. That can make a significant difference to Continue reading “Why are NAND Flash Fabs so Huge?”