DDR DRAM has now been with us for a quarter century, and it has provided a lot of bandwidth. But this standard has become increasingly challenging to scale, and it has already proven to fall short of the demands of the modern AI datacenter.
What’s to become of Continue reading “Revolutionary New DDR Standards Expected”
On April 2nd SNIA hosted a CXL webinar to discuss where the technology currently is, and where it is headed. The Memory Guy was honored to play a part in this event.
Other speakers were Arthur Sainio, on behalf of SNIA, Mahesh Natu, on behalf of the CXL Consortium, and Torry Steed of SMART Modular, a company that has been one of the earliest providers of Continue reading “SNIA CXL Webinar Available On-Demand”
High-end xPUs (GPUs, TPUs, and other AI processors) use HBM memories to get the absolute highest memory bandwidth for training the Large Language Models (LLMs) used in today’s generative AI systems. These processors, used in the thousands by hyperscale datacenters, can consume a kilowatt each. As a result, they must dissipate a phenomenal quantity of heat. This has become a very challenging problem for these datacenters. (The Memory Guy should mention here that Objective Analysis plans soon to release a report on HBM.)
The problem has attracted the attention of Continue reading “AI xPUs to be Cooled by HBM”
All of a sudden HBM is the leading topic of conversation. Why is that? A good number of people ask the Memory Guy that question.
Sure, the recent explosion of generative AI has been the key part of that interest, but there was even more that encouraged competition into this market at an accelerated pace. The simple answer is that HBM, a DRAM used in AI applications, remained Continue reading “Why is Everyone Jumping Into the HBM Market?”
The Memory Guy is pleased to announce general availability of a new Objective Analysis Detailed Report: CXL Looks for the Perfect Home.
Since Compute Express Link (CXL) is so important to members of the DRAM market and the hyperscale computing community, the report focuses on those sectors, but it offers Continue reading “Announcing Our New CXL Report”
At long last a chip has been embodied to simplify the use of virtual memory, a computing architecture that has been in use since the 1960s. The Memory Guy was given a sneak peek at this new approach by no other than Olly Mugwump, a highly-respected computer architect and longstanding member and fellow of several important technical societies. The new design promises to accelerate memory accesses while Continue reading “Finally! A Real Virtual Memory Chip”
With all the interest in CXL lately it’s past time for The Memory Guy blog to weigh in on this new technology. Although I plan to write a little tutorial soon, this post will start with the idea that the reader already has some knowledge of CXL and can appreciate the two conundrums I am about to discuss.
CXL’s magic is mainly that it can add memory to systems in a way that doesn’t bog down the Continue reading “Two CXL Conundrums”
Infineon recently introduced a NOR flash chip with an LPDDR interface. Some clients have asked The Memory Guy: “Why would Infineon have done that?”
After all, LPDDR is mostly used in cell phones, and these boot from the enormous NAND flash that’s already in the phone. A byte of NAND is a couple of orders of magnitude cheaper than a byte of NOR, so a cell phone’s not going to use this part.
Infineon tells us that their target market is Continue reading “Infineon Introduces NOR with an LPDDR Interface”
The Memory Guy is pleased to announce the availability of a new Objective Analysis Brief, which is our name for a white paper. It’s called The Future of the Data Center.
The paper explores the new horizons of computing, including disaggregation, AI, IoT, etc., and explains the many different memory approaches that are being used or developed to enable these technologies, ranging from computational storage to DDR5 and CXL
Look for it at the top of the list of free documents on our White Papers page at Objective-Analysis.com.
Samsung has been strongly promoting its “Aquabolt-XL” Processor-In-Memory (PIM) devices for the past year. In this second post of a two-part series The Memory Guy will present other companies’ similar PIM devices, and will discuss the PIM approach’s outlook for commercial success.
Part 1 of this series explains the concept of Processing in Memory (PIM), details Samsung’s Aquabolt-XL design, and shares some performance data. It can be found HERE.
This is not at all the first Continue reading “Samsung’s Aquabolt-XL Processor-In-Memory (Part 2)”
