There’s never been a more exciting time for emerging memory technologies. New memory types like PCM, MRAM, ReRAM, FRAM, and others have been waiting patiently, sometimes for decades, for an opportunity to make a sizeable markets of their own. Today it appears that their opportunity is very near.
Some of these memory types are already being manufactured in volume, and the established niches that these chips sell into can provide good revenue. But the market is poised to experience a very dramatic upturn as advanced logic processing nodes drive sophisticated processors and ASICs to adopt emerging persistent memory technologies. Meanwhile Intel has started to aggressively promote its new 3D XPoint memory for use as a persistent (nonvolatile) memory layer for advanced computing. It’s no wonder that SNIA, JEDEC, and other standards bodies, along with the Linux community and major software firms are working hard to implement the necessary standards and ecosystems to support widespread adoption of the persistent nature of these new technologies.
This post introduces a Continue reading “Emerging Memories Today: New Blog Series”
It’s earnings call season, and we have heard of a slowing DRAM market and NAND flash price declines from Micron, SK hynix, Intel, and now Samsung. DRAM prices have stopped increasing, and that can be viewed as a precursor to a price decline.
Samsung’s 31 October, 2018 3Q18 earnings call vindicated Objective Analysis‘ forecast for a 2H18 downturn in memories that will take the rest of the semiconductor market with it.
Those familiar with our forecast know that for a few years we have been predicting a downturn in the second half of this year as NAND flash prices fall, followed by a DRAM price collapse. After the DRAM collapse the rest of the semiconductor market will undergo a downturn.
We’ve been calling for this downturn for some time. Dan Hutcheson at VLSI Research has been videotaping our forecast every December for the past Continue reading “Memory Market Falling, as Predicted”
It came as a surprise to the Memory Guy on Monday to receive a press release from Micron indicating that Intel and Micron had decided to end their NAND flash partnership.
This agreement, which was begun in 2006, helped the two companies to aggressively ramp into the NAND flash market by combining their resources. NAND flash makers (as well as DRAM makers) need to make very substantial capital investments to participate in the market, and that’s not easy for a new entrant. Micron at that time was a very small NAND flash maker, and Intel wasn’t involved in the NAND flash market at all, so neither was in a position to succeed. By combining their resources the companies were able to become important contributors to the market.
The agreement initially appeared to be modeled after the very successful joint venture that Toshiba and SanDisk enjoyed. Each company would contribute half of the JV’s capital investment, and the same designs would be used to make both companies’ chips.
Over time Intel found itself in a familiar Continue reading “Micron and Intel to End NAND Flash JV”
On its way out the door the Obama Administration put together a proposed response to China’s plans to invest $150 billion in the semiconductor market over the next five years. It seems that US semiconductor industry views China’s investment as a threat to its position in the market.
Last week the President’s Council of Advisors on Science and Technology (PCAST) delivered a 25-page Report to the President entitled: “Ensuring Long-Term U.S. Leadership in Semiconductors.”
You might ask: “Who is PCAST?” The organization states its mission in this paragraph: “The President’s Council of Advisors on Science and Technology (PCAST) is an advisory group of the Nation’s leading scientists and engineers, appointed by the President to augment the science and technology advice available to him from inside the White House and from cabinet departments and other Federal agencies. PCAST is consulted about, and often makes policy recommendations concerning, the full range of issues where understandings from the domains of science, technology, and innovation bear potentially on the policy choices before the President.”
PCAST has a small Semiconductors Working Group whose elite members include Continue reading “US Plans Response to China’s Chip Plan”
According to a Business Korea article Samsung announced, during a June 14 investor event, plans to reduce its DRAM capital spending and shift its focus to 3D NAND.
The Memory Guy sees this as an unsurprising move. This post’s chart is an estimate of DRAM wafer production from 1991 through 2014. There is a definite downtrend over the past few years. The peak was reached in 2008 at an annual production of slightly below 15 million wafers, with a subsequent dip in 2009 thanks to the global financial collapse at the end of 2008. After a slight recovery in 2010 the industry entered a period of steady decline.
The industry already has more than enough DRAM wafer capacity for the foreseeable future.
Why is this happening? The answer is relatively simple: the gigabytes per wafer on a DRAM wafer are growing faster than the market’s demand for gigabytes.
Let’s dive into that in more detail. The number of gigabytes on a DRAM wafer increases according Continue reading “Understanding Samsung’s DRAM CapEx Cut”
Inotera recently announced earnings and posted an impressive 55% gross margin. Inotera is a pure-play DRAM maker, so it’s not too difficult to estimate the company’s process geometries based on its financials.
The Memory Guy thought it might be interesting to determine what I could from the 55% gross margin number.
First of all we can estimate Inotera’s manufacturing cost/GB based on the gross margin and an assumption about the company’s sales price/GB. The WSTS price per gigabyte for November was $7.83. Assuming that Inotera’s ASP was equal to this number, then at a gross margin of 55% the company’s cost/GB would have been $3.52.
Inotera’s acts as a foundry for Micron Technoogy. If Inotera sold to Micron at some lower price, then Inotera’s production costs would necessarily be proportionally lower to maintain the same gross margin.
Using the WSTS price: At a processed wafer cost of $1,600 (my rule of thumb) a $3.52/GB cost would require 454 8Gb dice to be produced Continue reading “Backing Out DRAM Process Rules”
A very unusual side effect of the move to 3D NAND will be the impact on the equipment market. 3D NAND takes the pressure off of lithographic steps and focuses more attention on deposition and etch. The reason for going to 3D is that it provides a path to higher density memories without requiring lithographic shrinks.
This sounds like bad news for stepper makers like ASML, Canon, and Nikon while it should be a boon to deposition and etch equipment makers like Applied Materials, Tokyo Electron, and Lam Research.
In its summer 2013 V-NAND announcement, Samsung explained that it would be Continue reading “3D NAND’s Impact on the Equipment Market”
The SIA yesterday released the WSTS semiconductor sales data for September. Monthly revenues reached a record $27 billion driving third-quarter revenues to their own record of $81 billion. This was the seventh straight month of semiconductor growth, the first such run-up since 2010.
This quote, by SIA CEO Brian Toohey really caught The Memory Guy’s eye: “Sales of memory products have increased sharply compared to last year and continue to be a major driver of industry growth.”
A lot has been happening to drive this increase in memory revenues: The recent SK hynix fire increased DRAM prices, but Continue reading “SIA: Memories Drive Record Semi Revenues”
Early this month I was invited to participate in Applied Materials’ (AMAT) Analyst Day. The sessions were rich in data covering the markets that would profit the company over the next few years.
Naturally, The Memory Guy fixated on those presentations that dealt with memory. When it came to the upcoming transition to 3D NAND, AMAT had a lot to say.
A later post will explain what 3D NAND actually is. Suffice it to say that today’s approach to making NAND flash has nearly reached its limit, and the approach that manufacturers plan to use in the future involves making NAND strings that stand on their ends. This has phenomenal implications on Continue reading “Applied’s Take on 3D NAND”
In a surprise announcement Toshiba has said that it will immediately cut NAND flash production by approximately 30%. The company explains that this is being done “to reduce inventory in the market and improve the overall balance between supply and demand.” Toshiba’s release implies that this move is expected to improve prices, which have dropped as low as $0.31/GB recently.
By common measures of market share, which typically leave out SanDisk (for reasons too complex to discuss here) Toshiba holds a share of roughly 30% of the NAND flash market. By cutting its output by 30% Toshiba would be reducing overall NAND supply by 10%. If we were to include SanDisk, then that percentage would decrease to about 7.5%. Either one of these is significantly more than Continue reading “Toshiba to Cut NAND Production by 30%”