Infineon recently introduced a NOR flash chip with an LPDDR interface. Some clients have asked The Memory Guy: “Why would Infineon have done that?”
After all, LPDDR is mostly used in cell phones, and these boot from the enormous NAND flash that’s already in the phone. A byte of NAND is a couple of orders of magnitude cheaper than a byte of NOR, so a cell phone’s not going to use this part.
Infineon tells us that their target market is Continue reading “Infineon Introduces NOR with an LPDDR Interface”
Before there was DRAM (1969, Bob Dennard) or SRAM (1963, Robert H. Norman) there was another little-known random-access memory from computer maker NCR that was known as CRAM. The Memory Guy only recently learned of this technology thanks to a relative’s visit to the NCR Collection in the Dayton History Museum in Dayton, Ohio.
CRAM, a magnetic technology, was a vital part of the Continue reading “Introducing a RAM You Never Heard of – CRAM!”
I wasn’t aware of any NAND memories prior to NAND flash, but recently learned that the idea wasn’t new, and other developments that enabled NAND flash were also developed before NAND flash memory was invented.
Although these ideas never reached commercial success the way that Continue reading “NAND Memories Before Flash?”
Although The Memory Guy spends more time writing about NAND and DRAM than almost anything else, several other memory types ship in high volume that many people have never heard of. One of these is the Content-Addressable Memory, or CAM.
CAMs are kind of backwards. In a normal memory chip you input Continue reading “The Rarely Seen, But Beautiful Content-Addressable Memory (CAM)”
Although Objective Analysis has published its “Brief” format white papers for some time, this line has never received the focus that it deserves. To remedy that, we are taking the most interesting and timeless of the Insights that we have published on membership website Smartkarma and providing them to our friends for a reasonable price.
The Brief is a very short report format used to make a succinct Continue reading “Introducing New Objective Analysis Briefs”
For some time two sides of the computing community have been at odds. One side aims to add layers to the memory/storage hierarchy while other side is trying to halt this growth.
This has been embodied by recent attempts to stop using objective nomenclature for cache layers (L1, L2, L3) and moving to more subjective names that aim to limit any attempt to add another new layer.
This is a matter close to my heart, since Continue reading “Putting the Brakes on Added Memory Layers”
Microchip Technology is now shipping a memory chip that has been designed to provide the most popular features of emerging memory chips without using any non-standard semiconductor technologies. It’s as fast as an SRAM with the nonvolatility of an EEPROM.
Readers may recall that Tom Coughlin and I recently updated Continue reading “Microchip’s Answer to Emerging Memories”
A significant transition has occurred over the past few years that many people don’t know about: Flash memory has moved almost wholesale from the floating gate bit cells, the process that they had always used before, to charge trap bit cells.
Until 2002 all flash used a floating gate. That year partners AMD & Fujitsu, who later merged Continue reading “The Invention of Charge Trap Memory – John Szedon”
During Intel’s latest earnings announcement the company provided information to indicate that 3D XPoint, which Intel sells under the name “Optane”, may have finally reached break-even: It may no longer be selling at a loss.
How would The Memory Guy know? Well, in fact, I don’t, but I can make an informed guess.
The chart below shows Continue reading “Did 3D XPoint Costs Reach Break-Even?”
Readers have asked when I will be speaking at the Flash Memory Summit. There will be a number of opportunities to see me there.
Before I give details, I should make sure that anyone who is unfamiliar with the show knows that this is an annual event that has grown steadily over the past 14 years to become the biggest show of its kind. It is held in the Santa Clara Convention Center in Santa Clara, California, in early August. This year it will be Tuesday-Thursday, August 6-8, and is preceded by the MRAM Developer Day.
Here are the details of Continue reading “My Flash Memory Summit Schedule”