This post shares a new and entertaining animation by Charlotte Streeter that offers one interpretation of the inner workings of one type of SiO-based nonvolatile memory like those described in Ron Neale’s most recent post on The Memory Guy.
The video links the observed electrical characteristics to the structural Continue reading “Video: The Inner Workings of SiO ReRAM”
In this post contributor Ron Neale analyzes Weebit Nano’s recently-announced memory array, based on SiO and an Ovonic Threshold Switch selector developed by CEA-Leti in France. Ron employs his extensive background in Ovonic devices to try and sleuth out the characteristics of both the memory element and the selector, and to understand some of the inner workings of the cell.
Weebit-Nano (Hod Hasharon, Israel), have recently reported some first steps on the path they have outlined to meet their bold claim of Continue reading “Weebit-Nano’s First Small Steps on the NV Memory Road”
The Memory Guy is pleased to announced the release of a new report by Objective Analysis and Coughlin Associates: Emerging Memories Take Off.
The report is the 2021 update of our popular 2020 emerging memories report, and includes detailed technology profiles of MRAM, ReRAM, FRAM, PCM/XPoint and other technologies, profiles of Continue reading “New Report: Emerging Memories Take Off”
Ron Neale enjoyed an extensive e-mail correspondence with Professor Carlos Paz de Araujo of the University of Colorado in Colorado Springs, and founder of Symetrix, about Symetrix’ new approach to ferroelectric memory technology. In this post Ron provides an overview of that conversation that provides significant insight into why FRAMs hit their limit at 180nm, and why they suddenly have opportunities at the most advanced process lithographies.
Ferroelectric memory was one of the earliest and first of the non-volatile (NV) emerging memory technologies to make significant Continue reading “Symetrix: The Next Big Step for FeFETs”
For some time two sides of the computing community have been at odds. One side aims to add layers to the memory/storage hierarchy while other side is trying to halt this growth.
This has been embodied by recent attempts to stop using objective nomenclature for cache layers (L1, L2, L3) and moving to more subjective names that aim to limit any attempt to add another new layer.
This is a matter close to my heart, since Continue reading “Putting the Brakes on Added Memory Layers”
In an investor conference call today Micron Technology announced that it would discontinue further development of the 3D XPoint memory that the company had developed in partnership with Intel, phasing out production and selling off the Lehi, Utah fab (pictured) that makes 3D XPoint.
Micron said that it has determined that the market for the product is too small to Continue reading “Micron Bows Out of 3D XPoint Business”
Contributor Ron Neale joins us again to review a recently-published article in the journal Nature Scientific Reports. While the main focus of the paper is on using a nitrogen environment to generate stable memory selectors from ZnTe, it also provides some new inputs through which he finds further support of his theories of Forming and device behavior.
A recently-published Nature Scientific Reports article by a research team from Hanyang and Kunsan Universities in The Republic of Korea focuses on Continue reading “ZnTe Selectors to Solve NVM Fabrication Problems”
Microchip Technology is now shipping a memory chip that has been designed to provide the most popular features of emerging memory chips without using any non-standard semiconductor technologies. It’s as fast as an SRAM with the nonvolatility of an EEPROM.
Readers may recall that Tom Coughlin and I recently updated Continue reading “Microchip’s Answer to Emerging Memories”
In this post contributor Ron Neale shares a close look at the new memory announced today by Arm spin-off Cerfe Labs. He provides insight into the operation and composition of this technology which originated at Symetrix, a company that has previously developed FRAM technologies licensed to major semiconductor and capacitor manufacturers.
While many companies seek to offer a nonvolatile (NV) alternative to Flash, with varying degrees of success, something new called a correlated electron memory (CeRAM) has entered Continue reading “CeRAM Moves Front and Center on the NV Memory Stage”
Our PCM maven Ron Neale explored how PCM is being used to benefit Artificial Intelligence (AI) and Machine Learning (ML) applications. Although AI is a new spin to The Memory Guy blog, there is a striking similarity between memory chips and certain AI applications, most particularly Neural Networks.
In this post Ron delves into a recent piece of IBM research published in Nature Electronics, that uses Hyperdimensional Computing algorithms to Continue reading “IBM Put PCM at the Core of Hyperdimensional Computing (HDC)”