Non-silicon memory technologies have been studied for about as long as have silicon-based technologies, but the silicon technologies have always been preferred. Why is that, and why should anything change?
This is a question that The Memory Guy is often asked. The answer is relatively simple.
Silicon memory technologies benefit from the fact that they have always been manufactured on process technologies that are nearly identical to those used to produce CMOS logic, and can therefore take advantage of the advancements that are jointly developed for both memory and logic processes. In fact, before the middle 1980s, logic and memory processes were identical. It wasn’t until then that the memory market grew large enough (over $5 billion/year) that it could support any additional process development on its own.
Even so, memory processes and logic processes are more similar than different. This synergy between memory and logic continues to reduce the process development cost for both memories and logic.
Emerging memories depart from Continue reading “Emerging Memories Today: Why Emerging Memories are Necessary”
There’s never been a more exciting time for emerging memory technologies. New memory types like PCM, MRAM, ReRAM, FRAM, and others have been waiting patiently, sometimes for decades, for an opportunity to make a sizeable markets of their own. Today it appears that their opportunity is very near.
Some of these memory types are already being manufactured in volume, and the established niches that these chips sell into can provide good revenue. But the market is poised to experience a very dramatic upturn as advanced logic processing nodes drive sophisticated processors and ASICs to adopt emerging persistent memory technologies. Meanwhile Intel has started to aggressively promote its new 3D XPoint memory for use as a persistent (nonvolatile) memory layer for advanced computing. It’s no wonder that SNIA, JEDEC, and other standards bodies, along with the Linux community and major software firms are working hard to implement the necessary standards and ecosystems to support widespread adoption of the persistent nature of these new technologies.
This post introduces a Continue reading “Emerging Memories Today: New Blog Series”
There has been a lot of discussion in the trade press lately about new memory technologies. This is with good reason: Existing memory technologies are approaching a limit after which bits can’t be shrunk any smaller, and that limit would put an end to Moore’s Law.
But there are even more compelling reasons for certain applications to convert from today’s leading technologies (like NAND flash, DRAM, NOR flash, SRAM, and EEPROM) to one of these new technologies, and that is the fact that the newer technologies all provide considerable energy savings in computing environments.
Objective Analysis has just published a white paper that can be downloaded for free which addresses a number of these technologies. The white paper explains why energy is wasted with today’s technologies and how these new memory types can dramatically reduce energy consumption.
It also provides a Continue reading “Latest White Paper: New Memories for Efficient Computing”
Last year I stumbled upon something on the Internet that I thought would be fun to share. It’s the picture on the left from a 1978 book by Laurence Allman: Memory Design Microcomputers to Mainframes. The picture’s not too clear, but it is a predecessor to a graphic of the memory/storage hierarchy that The Memory Guy often uses to explain how various elements (HDD, SSD, DRAM) fit together.
On the horizontal axis is Access Time, which the storage community calls latency. The vertical axis shows cost per bit. The chart uses a log-log format: both the X and Y axes are in orders of magnitude. This allows a straight line to be drawn through the points that represent the various technologies, and prevent most of the technologies from being squeezed into the bottom left corner of the chart.
What I find fascinating about this graphic is not only the technologies that it includes but also the way that it’s presented. First, let’s talk about the technologies.
At the very top we have RAM: “TTL, ECL, and fast MOS static types.” TTL and ECL, technologies that are seldom Continue reading “Storage/Memory Hierarchy 40 Years Ago”
Objective Analysis has just released a new report covering the nonvolatile dual inline memory module (NVDIMM) market in detail. This report, Profiting from the NVDIMM Market, explains the What, How, Why, & When of today’s and tomorrow’s NVDIMM products.
My readers know that I have been watching this market for some time, and that I am always perplexed as to whether to post about NVDIMMs in The Memory Guy or in The SSD Guy, since these products straddle the boundary between memory and storage. This time my solution is to publish posts in both!
The Objective Analysis NVDIMM market model reveals that the market for NVDIMMs is poised to grow at a 105% average annual rate to nearly 12 million units by 2021. This finding is based on a forecast methodology that has provided many of the most consistently-accurate forecasts in the semiconductor business. This forecast, and the report itself, were compiled through exhaustive research into the technology and the events leading up to its introduction, vendor and user interviews, and briefings from standards bodies.
This 80-page in-depth analysis examines all leading NVDIMM types and forecasts their unit and revenue shipments through 2021. Its 42 figures and 14 tables help Continue reading “New Report Details NVDIMM Market”
Beleaguered Toshiba finally unveiled its restructuring plan on Friday. The plan aims to return the company to profitability and growth through management accountability.
A lot of the presentation focused on the memory business, a shining star of the Toshiba conglomerate, which has so far included appliances, nuclear power plants, and medical electronics.
Toshiba has big plans for its Semiconductor & Storage Products Company, calling it “A pillar of income with Memories as a core business”. The company plans to enhance its NAND flash cost competitiveness by accelerating development of BiCS (Toshiba’s 3D NAND technology) and by expanding its SSD business. There are three parts to this effort:
- Grow 3D NAND production capacity
- Speed up 3D NAND development
- Increase SSD development resources
This post’s graphic is an Continue reading “Toshiba Restructuring: New 3D Fab Coming”
With Micron & Intel’s July 28 introduction of their new 3D XPoint memory both companies touted that his is the first new memory in a long time, and that the list of prior new memory types is short.
How short is that list? Interestingly, Intel and Micron have different lists. The Micron list, shown in this post’s graphic (click to enlarge), cites seven types: “Ram” (showing a vacuum tube), PROM, SRAM, DRAM, EPROM, NOR flash, and NAND flash. Intel’s list adds magnetic bubble memory, making it eight. (Definitions of these names appear in another Memory Guy blog post.)
The Memory Guy finds both lists puzzling in that they left out a number of important technologies.
For example, why did Intel neglect EEPROM, which is still in widespread use? EEPROMs (or E²PROMs) are not only found in nearly every application that has a serial number (ranging from WiFi routers to credit cards), requires calibration (like blood glucose monitoring strips and printer ink cartridges), or provides operating parameters (i.e. the serial presence detect – SPD – in DRAM DIMMs), but they still ship in the billions of units every year. In its time EEPROM was an important breakthrough. Over the years EEPROM has had a much greater impact than has PROM.
And, given that both companies were willing to include tubes, a non-semiconductor technology, why did both Continue reading “How Many Kinds of Memory Are There?”
Today Avalanche Technology announced that it is sampling MRAM, making it the world’s second company to actually produce this much-researched technology.
For those unfamiliar with MRAM, it is one of a number of technologies being positioned to replace currently-entrenched memory technologies once they reach their scaling limits. Regular Memory Guy readers know that this juncture has been anticipated for a few decades, but always seems to get postponed.
MRAM, like many other alternative technologies, offers the promise of scaling beyond the limits of DRAM and NAND to become cheaper than ether of these technologies. Add to this its fast write speed, low power, lack of refresh, nearly unlimited endurance, and nonvolatility, and it becomes a very compelling alternative over the long term.
As opposed to the other MRAM-maker Everspin, Avalanche’s MRAM uses Continue reading “Avalanche Samples MRAM”
There has been quite a lot of interest over the past few days about the apparently-inadvertent disclosure by Intel of its server platform roadmap. Detailed coverage in The Platform showed a couple of slides with key memory information for the upcoming Purley server platform which will support the Xeon “Skylake” processor family. (A review of this post on 7/13/17 revealed that The Platform’s website has disappeared. The above link and the next one no longer work.)
One slide, titled: “Purley: Biggest Platform Advancement Since Nehalem” includes this post’s graphic, which tells of a memory with: “Up to 4x the capacity & lower cost than DRAM, and 500x faster than NAND.”
The Memory Guy puzzled a bit about what this might be. The only memory chip technology today with a cost structure lower than that of DRAM is NAND flash, and there is unlikely to be any technology within the leaked roadmap’s 2015-2017 time span that will change that. MRAM, ReRAM, PCM, FRAM, and other technologies can’t beat DRAM’s cost, and will probably take close to a decade to get to that point.
Since that’s the case, then what is this mystery memory? If we think of Continue reading “What Memory Will Intel’s Purley Platform Use?”
Everspin and Northwest Logic have just announced full interoperability between Northwest Logic’s MRAM Controller Core and Everspin Technologies’ ST-MRAM (Spin-Torque Magnetic RAM) chips. This interoperability is hardware proven on a Xilinx Virtex-7 FPGA and is now available for designs needing low-latency, high memory throughput using MRAM technology.
Since The Memory Guy knew that Everspin’s EMD3D064M ST-MRAM was fully DDR3 compatible, I had to wonder why the part would require a special controller – couldn’t it simply be controlled by any DDR3 controller?
Everspin’s product marketing director, Joe O’Hare, took the time to Continue reading “Why ST-MRAMs Need Specialized DDR3 Controllers”