How NAND Flash Can Reduce DRAM Requirements

In a comment to a recent Memory Guy post I stated that NAND flash can reduce DRAM requirements, even in PCs.  Some readers have told me that they wonder how this could be, so I will write this post to explain. Some years ago Objective Analysis noticed that clever server administrators were able to use … Continue reading “How NAND Flash Can Reduce DRAM Requirements”

Why DRAM Bit Growth will Suffer

It seems that DRAM makers are still unaware of the impact NAND flash will have on DRAM revenues.  Even though many are paying a lot of attention to the impact of the Tablet PC on Notebook PC shipments, few understand that even a healthy notebook market will start to place a decreasing focus on the … Continue reading “Why DRAM Bit Growth will Suffer”

MOSAID Samples 333GB/s HLNAND

MOSAID announced that the company is sampling a 333GB/s 512Gb HLNAND.  According to MOSAID the devices packages: “16 industry standard 32Gb NAND Flash die with two HLNAND interface devices to achieve 333MB/s output over a single byte-wide HLNAND interface channel. Conventional NAND Flash MCP designs cannot stack more than four NAND dies without suffering from … Continue reading “MOSAID Samples 333GB/s HLNAND”

NAND SSD Performance to Decline over Time

A few articles at Computerworld,  Tom’s Hardware, and The Verge were recently passed my way.  These reported on a paper presented at last week’s USENIX conference that predicted how NAND flash’s future performance declines would impact tomorrow’s SSDs. The paper found that SSD performance is likely to decrease over time as SSDs increase in capacity.  … Continue reading “NAND SSD Performance to Decline over Time”

A Change to Computing Architecture?

I got a phone call yesterday from Russell Fish of Venray Technology. He wanted to talk about how and why computer architecture is destined for a change. I will disclose right up front that he and I were college classmates.  Even so, I will do my best to give the unbiased viewpoint that my clients … Continue reading “A Change to Computing Architecture?”