Samsung Begins Operations at its Xi’an Fab

Samsung's Xi'an, China fabSamsung has announced that the company’s newest memory fabrication plant (Fab) in Xi’an, China has “begun full-scale production operations”, adding that: “The new facility will manufacture Samsung’s advanced NAND flash memory chips: 3D V-NAND.”

I immediately asked whether the plant will build products other than 3D NAND, and the company has replied that this will be the only product produced in the Xi’an plant.  What Samsung has not said is what is meant by “full-scale production operations.”  Typically wafer fabs start with a very low production capacity as new tools are being qualified, only ramping to high-volume production a year or more after initial production.

Samsung points out that production has begun a mere 20 months after initial groundbreaking, which is quite commendable for a facility of this size.  The plant’s floor space is 230,000 square meters or about 2.5 million square feet.  This is equivalent to the area of 40 football fields.  Another way to look at it is that the floor area of this building is roughly equal to three years’ worth of its total output in square meters of finished NAND chips.

V-NAND involves a number of processes that have never previously been attempted in semiconductors of any kind, and such innovation usually leads to significant delays, so it is possible that this fab will ramp more slowly than other NAND fabs.  These processes are detailed in a Memory Guy series explaining the “Whys” and “Hows” of 3D NAND.

4 thoughts on “Samsung Begins Operations at its Xi’an Fab”

  1. What is the price? that would tell who the customers are.
    Probably Enterprise.

    Why is Samsung not coming out with HMC if Micron can produce them.
    Do you know the price of it.
    I guess HMC is not going to be out until LPDDR4 is out 2-3 years.
    The Application that Altera is showing along with Micron has 10W TDP
    and was using heat sink fan on top of it.
    I feel that HMC is bigger deal but it seems all the processors would
    need to be redesigned for it to be useful like getting rid of all the cache.

  2. That would be a reasonable supposition if the same equipment and the same set up is used for planar NAND as for V-NAND. But one of the things that everyone agrees on w/r/t 3D is that the equipment and processes for the two types of chips are very different, and require completely different set ups.

    1. Yes, Sam, you are correct. It would be as inefficient to use a well-balanced V-NAND fab to make planar NAND as to use a DRAM or logic fab to build NAND. Even so, any of these can be done.

      Let’s assume that a planar NAND fab used one etcher for every two steppers, and a 3D NAND fab required two etchers for every one stepper. (I made these numbers up – they’re not real.) You could still build planar NAND in a 3D NAND fab, but you would be using the tools inefficiently, getting about 1/4 the output of a well-balanced planar NAND fab.

      Since it’s a new fab the equipment balance is probably not yet optimized. As it was scaled (by adding tools) management could choose whether to add tools that favored a planar process or tools that favored a 3D process. If it were scaled for planar, then a conversion to 3D would involve adding tools that were required to become efficient at 3D processing. If it had been scaled to produce a lot of planar NAND (i.e more than half of its maximum capacity) then some tools might even need to be removed.

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