(The following is an update of a post that originally ran on 29 November 2013. It was republished in 2024 as a part of a series to honor the 3D NAND inventors who have received the 2024 FMS Lifetime Achievement Award.)
Some of my readers have asked: “How is 3D NAND Continue reading “How Do You Erase and Program 3D NAND?”
(The following is an update of a post that originally ran on 8 November 2013. It was republished in 2024 as a part of a series to honor the 3D NAND inventors who have received the 2024 FMS Lifetime Achievement Award.)
My prior 3D NAND post explained how Toshiba’s BiCS cell works, using a silicon nitride charge trap to substitute for a floating gate. This post will look at an alternative Continue reading “An Alternative Kind of Vertical 3D NAND String”
(The following is an update of a post that originally ran on 1 November 2013. It was republished in 2024 as a part of a series to honor the 3D NAND inventors who have received the 2024 FMS Lifetime Achievement Award.)
Let’s look at how one form of 3D NAND is manufactured. For this post we will explore Continue reading “3D NAND: Making a Vertical String”
What really happens in NAND flash during an MLC, TLC, or QLC write? Although there are lots of websites that explain that multilevel cells store four, or eight, or sixteen different voltage levels on a cell (for MLC, TLC, or QLC), they don’t spell out the process of putting those voltage levels onto the bit cell.
Fortunately, Vic Ye, Manager, NAND Flash Characterization at Yeestor Microelectronics Co., Ltd. in Shenzhen, China presented the programming process in a series of short videos at the Flash Memory Summit last August. The Memory Guy was fortunate enough to attend his presentation. Yeestor is a fabless semiconductor manufacturer that manufactures flash storage controllers for SSDs (PCIe & SATA) and flash cards (SD, UFS, eMMC, etc.)
Mr. Ye later gave me permission to share his videos and these are the foundation of this post. They’re brief (13 seconds to 1:10) so they won’t take much time to review. The videos were a part of his slide presentation titled: A Graphical Journey into 3D NAND Program Operations that can be downloaded from The Flash Memory Summit website by clicking the presentation title above and entering your e-mail address.
A multilevel flash bit cell has Continue reading “Videos Demystify MLC NAND Programming”
