Backing Out DRAM Process Rules

Inotera HQInotera recently announced earnings and posted an impressive 55% gross margin.  Inotera is a pure-play DRAM maker, so it’s not too difficult to estimate the company’s process geometries based on its financials.

The Memory Guy thought it might be interesting to determine what I could from the 55% gross margin number.

First of all we can estimate Inotera’s manufacturing cost/GB based on the gross margin and an assumption about the company’s sales price/GB.  The WSTS price per gigabyte for November was $7.83.   Assuming that Inotera’s ASP was equal to this number, then at a gross margin of 55% the company’s cost/GB would have been $3.52.

Inotera’s acts as a foundry for Micron Technoogy.  If Inotera sold to Micron at some lower price, then Inotera’s production costs would necessarily be proportionally lower to maintain the same gross margin.

Using the WSTS price: At a processed wafer cost of $1,600 (my rule of thumb) a $3.52/GB cost would require 454 8Gb dice to be produced Continue reading “Backing Out DRAM Process Rules”

Micron NAND Reaches 16nm

Die Photo of Micron 16nm 128Gb NAND chipMicron has announced that it is sampling a new 128Gb NAND flash chip based upon a 16nm process, with production slated for the fourth quarter.  To The Memory Guy’s knowledge this is the tightest process available.

The company, with its partner Intel, gained a lead with its 20nm process generation through its use of a Hi-k tunnel dielectric, a new material that replaces more conventional silicon dioxide layer with a new material (Micron won’t say what) that yields the same capacitance with a thinner layer.  This has become very important with today’s tight processes because of issues of inter-cell interference.

Other NAND makers are migrating to Continue reading “Micron NAND Reaches 16nm”

Inside SanDisk’s & Toshiba’s New 128Gb NAND Chip

The Toshiba/SanDisk 128Gb NAND Flash ChipOne memory chip was so important that it was presented three times at this week’s International Solid State Circuits Conference (ISSCC) and that was the Toshiba/SanDisk 128Gb NAND flash.  This chip was shown by Eli Harari in Monday’s keynote, then was featured twice in the Wednesday afternoon Nonvolatile Memories session – once by Toshiba and once by SanDisk.

The NAND chip, measuring 170.6mm², is said by both companies to be the densest NAND available.  Compared to the Intel/Micron 64Gb 20nm NAND at 118mm², the device gives twice the bits in a 45% larger die area, so the companies’ claim rings true, since the only other NAND makers: Samsung and Hynix, have processes that fall far behind at 27nm and 26nm respectively.

Continue reading “Inside SanDisk’s & Toshiba’s New 128Gb NAND Chip”