Moore’s Law

Ron Neale To Share Posts

Ron NealeThe Memory Guy is pleased to begin publishing posts from Ron Neale.  Ron is a specialist in phase-change memory (PCM or PRAM) who has been contributing a lot of analysis of this technology in EE Times.

Ron’s career has centered around phase-change memory.  He was the lead author for the groundbreaking 1970 PCM article in Electronics Magazine, co-authored by Intel’s Gordon Moore (of Moore’s Law fame) introducing the world’s first PCM, a 256-bit device.

Now that the Intel/Micron 3D XPoint Memory has been revealed to use the same technology as Numonyx’ NOR-compatible PCMs, Ron’s analysis of this technology is especially poignant.

Look for posts that feature his keen insight on the technology, its particular challenges, and the ways that PCM is applied to practical problems in advance computing.

Why NAND is So Difficult to Scale

ASML chart chowing the lithography used for 4X, 3X, 2X, and 1Xnm planar NAND and 3D NANDNAND flash is the process leader in memory technology, and this puts it in a very challenging position: It must ramp to high volume production using techniques that have never been tried before.

The graphic for this post (click to enlarge), supplied by ASML, the semiconductor industry’s leading lithography tool supplier, illustrates the challenge of migrating from one process node to the next.  Across the bottom, on the X-axis, are representative process nodes ranging from “2D-45”, or two-dimensional (planar) 45nm NAND, to “3D-5x”, or three-dimensional 5xnm NAND.  Below these numbers are the year of volume production.

The vertical axis, labeled “Tolerance” represents the minimum Continue reading