Tag: vertical

In the prior post we discussed the need to go vertically into the body of the die, since NAND flash can not be scaled much farther in length and width on the die’s surface.  Toshiba invented a 3D NAND which has been adopted and refined by all flash makers.  The idea is simple: Rather than shrink the cell’s length and width, why not turn the NAND string so that it’s standing on its end?

This concept is illustrated by this post’s first graphic, which was provided by Applied Materials.  (Click on the graphic to see the whole thing at a larger size.)  A standard NAND string that normally runs longitudinally is turned on its end to become a vertical string.  Not only that, but it makes things easier if the string is split into two sections and Continue reading “What is a 3D NAND?”

A memory chip of a certain area costs about the same amount to produce, no matter how many bits it holds. Naturally, the more bits you can cram onto this chip, the cheaper the price per bit will be. Low cost is of the utmost importance in the world of memory.

Memory chip makers have shrunk the cost of a bit some nine orders of magnitude since the 1960s largely by shrinking the process, or “scaling” to increasingly tighter process geometries.

Flash has always been expected to reach a scaling limit. Over the past few generations technologists have developed Continue reading “Why Do We Need 3D NAND?”