(The following is an update of a post that originally ran on 6 December 2013. It was republished in 2024 as a part of a series on The Memory Guy blog to honor the 3D NAND inventors who have received the 2024 FMS Lifetime Achievement Award.)
A very unusual side effect of the move to 3D NAND was Continue reading “3D NAND’s Impact on the Equipment Market”
(The following is an update of a post that originally ran on 29 November 2013. It was republished in 2024 as a part of a series to honor the 3D NAND inventors who have received the 2024 FMS Lifetime Achievement Award.)
Some of my readers have asked: “How is 3D NAND Continue reading “How Do You Erase and Program 3D NAND?”
(The following is an update of a post that originally ran on 22 November 2013. It was republished in 2024 as a part of a series to honor the 3D NAND inventors who have received the 2024 FMS Lifetime Achievement Award.)
A prior post in this series (3D NAND: Making a Vertical String) discussed the difficulties of Continue reading “3D NAND: Benefits of Charge Traps over Floating Gates”
(The following is an update of a post that originally ran on 8 November 2013. It was republished in 2024 as a part of a series to honor the 3D NAND inventors who have received the 2024 FMS Lifetime Achievement Award.)
One of the thornier problems Continue reading “3D NAND: How do You Access the Control Gates?”
(The following is an update of a post that originally ran on 8 November 2013. It was republished in 2024 as a part of a series to honor the 3D NAND inventors who have received the 2024 FMS Lifetime Achievement Award.)
My prior 3D NAND post explained how Toshiba’s BiCS cell works, using a silicon nitride charge trap to substitute for a floating gate. This post will look at an alternative Continue reading “An Alternative Kind of Vertical 3D NAND String”
(The following is an update of a post that originally ran on 1 November 2013. It was republished in 2024 as a part of a series to honor the 3D NAND inventors who have received the 2024 FMS Lifetime Achievement Award.)
Let’s look at how one form of 3D NAND is manufactured. For this post we will explore Continue reading “3D NAND: Making a Vertical String”
(The following is an update of a post that originally ran 25 October 2013. It was republished in 2024 as a part of a series to honor the 3D NAND inventors who have received the 2024 FMS Lifetime Achievement Award.)
In the prior post we discussed the need to go vertically into the body of the die, since NAND flash can not Continue reading “What is a 3D NAND?”
(The following is an update of a post that originally ran 18 October 2013. It was republished in 2024 as a part of a series to honor the 3D NAND inventors who have received the 2024 FMS Lifetime Achievement Award.)
A memory chip of a certain area costs about the same amount to produce, no matter how many bits it holds. Naturally, the more bits you can cram onto this chip, the cheaper the price per bit will be. Low cost is of the utmost Continue reading “Why Do We Need 3D NAND?”
Back in 2013, when Samsung announced its V-NAND, the first production 3D NAND, The Memory Guy blog carried a series of posts to explain the new technology and the reason it was so necessary.
Now that the inventors of this technology have been honored with the FMS Lifetime Achievement Award, I decided that it was time to refresh that series of blog posts. Once a week for the next nine weeks I will be reissuing a post in this series. I hope that these will Continue reading “What is 3D NAND? Why do we need it? How do they make it?”
One of the most intriguing revelations during the Flash Memory Summit two weeks ago was Samsung’s new approach to stairstep etch in 3D NAND. This was one of numerous innovations the company’s EVP of Flash Products & Technologies, Kye Hyun (KH) Kyung, shared during Samsung’s Tuesday Morning keynote presentation.
The Memory Guy would point readers to the pdf of Samsung’s presentation on the Flash Memory Summit website, but it isn’t there, and it’s unlikely to ever be posted there. Samsung seems to have a policy that prohibits sharing such presentations.
Although I was unable to get a copy of the drawing that the keynoter used, I have tried to re-create it using, of all things, Excel! The result is the graphic for this blog post. The only thing I was unable to easily recreate was the different colors representing the layers of the 3D NAND. You’ll need to use your imagination and envision layers of two colors, with all the surfaces exposed on the top being the same color, but at different layers of a 64-layer structure.
Today’s common approach to 3D NAND’s stairstep is to etch a simple step pattern in one dimension, which I illustrated in an early 3D NAND blog post four years ago. This is a challenging Continue reading “How Samsung Will Improve 3D NAND Costs”
