Valuable Memory Technical Resources

India Inst of Tech Hyderabad SealEver since moving to Silicon Valley some time ago The Memory Guy has worked with a number of impressively-talented engineers from India.  Some are educated in the US, while others are educated in India.  One university that produces excellent engineers is the Indian Institute of Technology, or IIT.

It comes as no surprise, then, to find a valuable resource produced by an IIT faculty member.  Dr. Sparsh Mittal, an assistant professor at IIT Hyderabad, reached out to me to share some papers that he thought might be of interest to Memory Guy readers. They were a few of roughly 40 papers that he has posted on his publications page.  He explained that he previously worked at Oak Ridge National Lab, in the US.

Dr. Sparsh has published several very comprehensive surveys on memory systems, both conventional and emerging, covering topics like DRAM reliability, NVM/Flash, ReRAM-based processing-in-memory, and the architecture of neural networks.  The web page lists 34 surveys, eight of them published in 2018 alone!  Five of those eight recent surveys cover memories and compare research works in:

  • Encoding Techniques for Reducing Data-Movement Energy
  • Techniques for Improving Error-Resilience of DRAM
  • ReRAM-based Architectures for Processing-in-memory and Neural Networks
  • Techniques for Improving Security of Non-volatile Memories
  • Techniques for Architecting SLC/MLC/TLC Hybrid Flash Memory based SSDs

I have so far only read one of these surveys (38 pages, plus references), and found it to be extremely thorough.  It’s the second one in the list above, and it examines and cross-compares the error correction techniques that were published in about 80 different studies.

This survey first explains the many known failure modes of DRAM chips and systems (including TSV stacks), and follows with five major categories of error correction and multiple subcategories to explain how each one addresses a particular subset of those failure modes.  The survey provides a table for each of the major categories to document which of the referenced papers uses which techniques.

Dr. Sparsh carefully explains the strengths and weaknesses of each technique, and gives information about how much additional memory is required to implement that technique.  His writing is easy to read since he writes in a conversational style instead of using the unwieldy passive sentences that are typical of electronics research work.  Each chapter of the survey ends with a paragraph that outlines future challenges to be solved with that chapter’s approach.

I think it’s fair to assume that all of Dr. Sparsh’s other surveys are of a similar quality, and will recommend them as a resource for anyone who wants to study a topic in depth, but may not have the time to read 80 papers on the topic.

The URL for this publications list is


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