In the world of startups it’s unusual to see one that disciplines itself to a steady cadence of consistent execution. Countless times The Memory Guy blog has profiled companies that perform some important feat, and then fail to repeat that success. With that background it’s refreshing to see a company that methodically moves in a straight line towards its goal.
The company I am talking about today is Weebit Nano. This company is a developer of a new kind of resistive RAM (ReRAM) that is based on conventional silicon, and not some new material. The difficulty with new materials is that they are not well understood by semiconductor manufacturers, resulting in considerable unforeseen issues on the way to mass production. While there are numerous other ReRAM developers, many introduce some new and exotic material and few have made the kind of steady progress that Weebit has.
ReRAM and other emerging memories like MRAM and FRAM, have captured the interest of semiconductor makers for years for a very simple reason: Today’s established memory technologies are fast approaching their scaling limit. NOR flash has already reached that limit. Tom Coughlin and I have explained this in great detail in our most recent emerging memory report: Emerging Memories Branch Out.
Over the time that I have been watching the company, Weebit has proven the feasibility of its basic ReRAM technology, has partnered with CEA Leti to develop the all-important 2-terminal selector needed for stackable crosspoint arrays, has brought a 130nm embodiment of the technology into a licensable form at Skywater Technology’s foundry (Skywater has a reputation of successfully bringing exotic memory technologies into production), and has recently joined forces with a top-ten foundry, DB HiTek in Korea, to produce its technology.
In the near term Weebit plans to introduce a 22nm version of its technology. Farther out it plans for a transistor-based cell to be adopted as an embedded memory to take the place of NOR flash at processes where NOR doesn’t exist because of scaling issues. In brief, this is any process technology smaller than 28nm, after which FinFETs replace standard planar FETs. Also, over the longer term, the company plans to use crosspoint arrays, and stacked crosspoint arrays, to produce a cost-effective nonvolatile memory that approaches DRAM speeds for both read and write. These will be based on the 2-terminal selector that Weebit and Leti have co-developed.
Weebit’s ReRAM, shown above, uses a certain variation on the same silicon dioxide that is prevalent as a dielectric in all silicon semiconductors. When properly processed, this dielectric can provide a resistance that can be electronically changed from a conductive to a non-conductive state. In this photo it’s the six wider parts towards the tops of the columns. A close-up view of a couple of these bit cells appears below:
Those who want a really deep dive into Weebit’s technology should read Ron Neale’s Memory Guy blog post titled Weebit-Nano’s First Small Steps on the NV Memory Road.
If you look over the company’s press releases you see a story of ongoing modest achievements that all pave a path for achieving Weebit’s end of becoming both an embedded and a discrete memory technology.
Along the way the company has received a number of awards for its technology, giving it more of the kind of credibility the company will need to win end users for the technology. That point should come soon, with two foundries supporting it. The most recent award, announced on 25 October, named Weebit’s ReRAM the Embedded Solution Product of the Year in The Electronic Industry Awards.
It’s easy to see why the company’s methodical approach should lead to success, particularly since its ReRAM is based on standard semiconductor materials. The Memory Guy will continue to watch Weebit’s progress, and wishes the company continuing success in achieving its goals.
