From time to time I am asked: “Why is NAND flash called NAND?” or “Why do we say RAM?” and similar questions. A lot of this has to do with history, and a lot of terminology which is now obsolete. To understand these strange names, you have to understand the history of memories. The Computer History Museum (CHM) in Silicon Valley is a great help in this vein.
Since the Memory Guy has been in Silicon Valley since 1977, a lot of this information is stored in my head. Let me try to share it with you in a way that I hope will make more sense, and will help outsiders to understand these odd names.
Here’s the history of memory nomenclature, as I understand it:
Shift Registers: The first MSI (Medium-Scale Integration, that boasted hundreds of transistors per chip) memory products, 8-bit shift registers, were built out of J-K flip flops. Like a register in a computer, these products could hold one byte of information, but it was accessed by shifting the data around in a circle. The serial access saved connections, but made it more challenging to read the data. Shift registers were like a solid-state version of the popular delay line, but had the advantage that they were synchronized to the CPU’s clock.
RAM: Random-access memories were a superior alternative to shift registers because you didn’t have to read them sequentially, but could access data in random order instead. This was similar to the core memories that these semiconductor devices replaced. Address decoding was inside the chip. Each bit was still a J-K flip flop made up of bipolar transistors.
DRAM: IBM’s Dr. Robert Dennard in 1967 figured out that you could use a capacitor to store a bit (like a solid-state version of the Williams tube). This was a whole lot cheaper than a J-K flip flop since it used one transistor per bit rather than about a dozen, and it got even cheaper when they made it out of MOS instead of bipolar transistors. The only problem was that these capacitors leaked off charge, so a set bit didn’t stay set and a cleared bit wouldn’t stay cleared. The entire device had to be read and re-written time after time to “refresh” errant bits back to their original states before they became unreadable. The cost difference, though, was so compelling that users quickly adopted this new device. With true marketing flare someone decided to name this a “dynamic” process, and the term “dynamic RAM” or DRAM was coined. With this new term, RAM had to be renamed to SRAM (Static RAM) to differentiate it. DRAM drove semiconductor technology to LSI densities (1,000 transistors/chip or more.)
ROM: Another cheap way to make memory was to use one transistor per bit with a metal link to set the bit (or not) during the manufacturing process. The memory could be read from, but not written to, thus it was called “Read-Only Memory” or ROM. Except for its read-only nature it was externally very similar to a RAM. This is sometimes called “Mask ROM” or MROM since the manufacturing process used to set bits involves a photographic masking step common to semiconductors in general.
PROM: Since programmers didn’t want to lock down their code early in the development process, designers found a way to blow fuses on a chip and still have the advantages of a single-transistor bit, thus creating the “Programmable ROM” or PROM. Since it can only be programmed once the device is often called: “One-Time Programmable” or OTP. This started out in bipolar and moved to MOS.
EPROM: Simon Sze at Bell Labs (who received the Flash Memory Summit Lifetime Achievement Award in 2014) figured out how to make a MOS transistor with a floating gate but Bell Labs’ parent company made linear chips didn’t know how to use the floating gate in a linear circuit, so it was put on a shelf for a few years until Intel decided that this was a good way to make reprogrammable bits in a memory. This new “Erasable PROM” or EPROM was like a MOS PROM but used a floating gate programming to hold the programmed data. One advantage was that all of the bits in the device could be simultaneously set by shining a UV light on the die.
EEPROM: Since people generally didn’t like removing chips to erase them under a UV light George Perlegos at Intel figured out a way to drive a reset bit back to being set by making each bit out of two transistors instead of one. This more than doubled the cost of the chip, but some systems needed field reprogrammability and this was accepted despite the higher cost.
Flash: Fujio Masuoka of Toshiba, wondered how to achieve EEPROM functionality at EPROM prices. He decided to erase the whole chip with a single very large transistor, so that instead of having what boiled down to a program and an erase transistor per bit there was only a program transistor. The large erase transistor didn’t make the chip much larger than an EPROM. Since it erased all at once he said it was done in a flash.
NAND: Another Masuoka invention was to shrink the chip further by removing half the signal lines and making all the bits communicate through their neighbors. In all other memories there are both vertical and horizontal signal lines (bit lines and word lines.) In NAND flash there are as many bit lines as in other memory chips, but only one word line per page (often 4,096 bits.) This saves a lot of room on the chip but makes the device hard to use, especially for code storage. Like the old shift registers, you have to read them sequentially. With this new term, the original flash had to be renamed to NOR to differentiate it, the logic being that one structure “kind of” resembled a NAND gate and the other “kind of” resembled a NOR gate. If you use quite a bit of imagination you might even agree with this.
These names all include a lot of old archaic rationale, but since they are all in common use, nothing is likely to change!
If you want to understand how most of these memories work, see the online course that The Memory Guy put together for EE Times.
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10 thoughts on “Why Do Memories Have Those Odd Names?”
What does AND mean? I get the N is Not, but what does AND stand for?
NAND and NOR are basic digital logic functions or gates. “NOR” stands for “Not OR” and NAND for “Not AND”. I see that you already understand that.
OR and AND are two of the three fundamental digital logic elements that are the basis of all modern computers. Both functions have multiple inputs and a single output.
The output of an OR goes high (a logic “1”) if any of the inputs goes high. If you have two inputs then when either the first “or” the second goes high the output goes high.
The output of an AND goes high only if all of its inputs go high. If you have two inputs then the first “and” the second inputs both have to go high to make the output go high. If you have a dozen inputs then all twelve have to go high (1 and 2 and 3… and 12).
Although people commonly capitalize these, they are not acronyms! They don’t actually stand for anything.
Every single function of a processor is built out of a combination of these two very fundamental functions plus a NOT or inverter function, whose output goes high if the input is low, or low if the input goes high.
A NAND gate behaves like an AND gate followed by an inverter: The output goes low only if every input goes high. A NOR gate behaves like an OR gate followed by an inverter: The output goes low if any of the inputs goes high.
You use fewer transistors on your chip if you use NAND and NOR than if you use AND and OR, so logic is built out of NAND and NOR gates, and this is why Masuoka’s associates noted the resemblance between the NAND and NOR gates they were accustomed to and the layout of the two different kinds of flash memory chip.
I hope that clarifies things.
Enjoyed the explanation. But am not sure why you do not mention eMMC and SSD here. Are those belonging in a different category?
I used to program phones for Motorola in the 90s. So I used the PROM and EPROM all the time. Nice to see them listed in historical perspective.
Went over this past XMas to the Chicago historical society museum. They had a display on the history of Motorola. It is kind of bizarre to see phones you have worked on listed in a museum – like I am a museum piece. My family had a good laugh.
Thanks for the comment.
SSD and eMMC are systems, since they involve multiple chips. I wrote the article to explain the names of individual chip technologies. I had to draw the line somewhere!
As for museums, I have had a similar experience as yous. A product I introduced in 1980 is in the Computer History Museum in Mountain View. Really makes you feel old, doesn’t it?
The right answer to this puzzle is simpler than you think.
NAND stands for ……..Never Ask Never Divulge.
Just look at the answer you were given before mine ,, does it make any sense ¿?????????????????
Jose, I like this!
It kind of sounds like espionage.
This was so helpful, I’m learning about computer parts and their history so I can build my own PC soon. I haven’t seen all this info broken down into such a digestible piece! Thank you for your knowledge. 🙂
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