During the Flash Memory Summit last August Facebook’s Jason Taylor, Director of Capacity Engineering and Analysis, asked in his keynote speech for a flash chip with dramatically lower cost per gigabyte, saying that he would readily give up speed and endurance to achieve this lower cost. Taylor called this “Cold Flash” and said he was willing to use something that was “Write Once, Read Many” or WORM for data that was unlikely to change over its lifetime. He said this was Facebook’s “Ask of the Industry.”
That same sentiment was echoed yesterday at Samsung’s Memory Solutions Forum by eBay’s Distinguished Engineer and Technologist Roark Hilomen, who said that he could live with 1/3rd the number of writes that normal flash supports as long as he could get it for 1/4 the price.
Unfortunately this is simply not possible.
Let’s do a little math to understand why. A 300mm NAND flash wafer, fully processed, costs about $1,600. The raw wafer that is used to produce that chip costs somewhere around $500. Assuming that Facebook were to buy an unprocessed wafer and cut it into the same number of chips then the manufacturing cost of each chip, without a single memory bit on it, would still be roughly one third that of today’s NAND flash.
The way you make that wafer into memory is by processing it. The process increases the cost of the wafer the other $1,100-odd dollars. Could we cut into that?
In a word – no. The way that NAND manufacturers continually lower their costs is by squeezing an increasing number of bits onto the wafer. This forces them to use very costly processes, and that accounts for that other $1,100. If they were to use less costly processes and step back a generation or two, the cost per wafer might go down a bit, but the bits per wafer would drop significantly.
Let’s say you were able to cut the wafer processing cost in half, from $1,100 to $550 (a Herculean task). This would come at a cost: you would have to cut the bits per wafer at least in half, if not more. Since you still have the $600 cost of the bare wafer to worry about, you would be getting half the bits at roughly 2/3rds of the cost, so the cost per gigabyte for this wafer would be higher than that of NAND on the most advanced process.
How about loosening the specs, as both gentlemen requested? One way to do this would be to test the chip less rigorously, the other would be to design the chip less solidly.
Looking at test – if a flash maker were to reduce testing costs by, say, testing only one chip in 100, the cost reduction would amount to something around 50 cents per chip. On an $8 128Gb chip this would reduce costs by only 6%.
From a design standpoint, any loosening of the specifications would have to come from changes in the periphery, since the bit cells in NAND flash are made so tiny that they are pushed to the ragged edge of operation. The peripheral circuitry of a NAND chip accounts for less than 10% of the total die area. Even if that circuitry were cut in half, the die size of the chip would shrink by 5% or less, reducing costs in proportion.
Perhaps we can solve Facebook’s and eBay’s issues by getting more to the heart of the matter – what are these gentlemen really looking for? It appears that they want something that performs a whole lot like flash at a price that is a whole lot like hard drives (HDDs). There’s about a 1,000:1 speed difference between flash and an HDD, at a cost difference of roughly 10:1. If eBay’s Hilomen were to get his lower-endurance flash at 1/4 the cost he would still be getting that 1,000:1 speed advantage at a markup of only 2.5 times the cost of an HDD.
Heck, anybody would like that kind of a deal!
Instead, these gentlemen will have to settle for a hierarchy of DRAM-flash-HDD for the foreseeable future.
Although a really cheap memory is a nice dream, it’s unlikely that any semiconductor memory will beat NAND flash’s cost until NAND reaches its scaling limit, which The Memory Guy covered in another post.
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