DRAM - The Memory Guy Blog

What’s This Nano-Imprint Litho that Toshiba and SK hynix are Co-Developing?

Last week Toshiba and SK hynix announced an agreement to jointly develop Nano Imprint Lithography (NIL), building on a memorandum of understanding (MOU) that two companies signed in December last year. Development efforts will begin this April and practical adoption is expected to start in 2017. The collaboration is expected to reduce risk and accelerate commercialization of this technology.

NIL is expected to produce next-generation lithography at high throughput rates more economically than established lithography tools. It is should compete against Extreme Ultraviolet (EUV) lithography, an alternative technology whose use has been delayed by numerous technical challenges. EUV, a euphemism for X-Rays, cannot use transmissive optics like glass lenses, so a completely new reflective imaging technology has had to be developed to support its use. The advantage of EUV is that the light wavelength is only 13nm, which is an order of magnitude smaller than the 193nm light currently used to produce leading-edge chips, allowing it to print significantly smaller features.

Unlike today’s lithography, which uses a purely photographic process, NIL mechanically stamps a pattern into the photoresist in a similar manner to the sealing wax stamp shown in the photo (courtesy of BackToZero, a wax stamp maker). The stamp is produced using Continue reading “What’s This Nano-Imprint Litho that Toshiba and SK hynix are Co-Developing?”

Semiconductor Market Ends Year on a High Note

The Semiconductor Industry Association this week announced the year-end World Semiconductor Trade Statistics (WSTS) revenues for 2014. Worldwide sales grew 9.9% to reach a record total of $335.8 billion, outperforming the WSTS fall forecast. Annual sales increased in all four regional markets for the first time since 2010. Memory was the fastest growing segment, increasing 18.2%, partly based on DRAM growth of 34.7%.It’s encouraging that all geographical areas experienced growth. This implies that the world economy is finally on the mend.

The industry’s 9.9% worldwide growth was a good bit lower than Objective Analysis’ December 2013 prediction of growth in excess of 20%. We admit that we overshot, expecting both higher bit growth and stronger pricing in DRAM and NAND flash than actually materialized.

The $335.8 billion number is really Continue reading “Semiconductor Market Ends Year on a High Note”

Backing Out DRAM Process Rules

Inotera recently announced earnings and posted an impressive 55% gross margin. Inotera is a pure-play DRAM maker, so it’s not too difficult to estimate the company’s process geometries based on its financials.

The Memory Guy thought it might be interesting to determine what I could from the 55% gross margin number.

First of all we can estimate Inotera’s manufacturing cost/GB based on the gross margin and an assumption about the company’s sales price/GB. The WSTS price per gigabyte for November was $7.83. Assuming that Inotera’s ASP was equal to this number, then at a gross margin of 55% the company’s cost/GB would have been $3.52.

Inotera’s acts as a foundry for Micron Technoogy. If Inotera sold to Micron at some lower price, then Inotera’s production costs would necessarily be proportionally lower to maintain the same gross margin.

Using the WSTS price: At a processed wafer cost of $1,600 (my rule of thumb) a $3.52/GB cost would require 454 8Gb dice to be produced Continue reading “Backing Out DRAM Process Rules”

New Book: Vertical 3D Memory Technologies

Wiley has recently published a new book by Betty Prince titled Vertical 3D NAND Technologies that is one to consider if you want to bring yourself up to speed on recent research behind today’s and tomorrow’s 3D memory technologies.

For those who haven’t previously encountered Dr. Prince, she is the author of a number of key books covering memory design and holds memory patents written over her 30-year career in the field.

The book provides capsule summaries of over 360 papers and articles from scholarly journals on the subject of 3D memories, including DRAM, NAND flash, and stacked chips.

These papers are organized into Continue reading “New Book: Vertical 3D Memory Technologies”

Fundamentals of Memory – Free Online Course

Some time ago The Memory Guy was asked by Numonyx (later acquired by Micron) to put together an online course for EE Times on memory technologies, explaining how each one works and where it is used.

Although the course was very well received, I never posted a link to it on The Memory Guy blog. This post is intended to correct that error.

The course runs 75 minutes and covers the basics of DRAM, non-volatile RAM, SRAM, NAND flash, NOR flash, mask ROM, and EEPROM. It explains each technology’s advances in size, cost and performance, leading up to the development of Continue reading “Fundamentals of Memory – Free Online Course”

Is the DRAM Market Entering a Shortage?

Long-term clients of mine, even those dating back to my decade at Dataquest in the 1990s, are familiar with the concept that spot prices behave differently during a shortage. When there is too much DRAM spot prices remain below contract prices, because OEMs who bought too much product clear their inventory at quarter end (and other times) by selling at a loss.

During a shortage the opposite is true: OEMS find that they can’t get as much DRAM as they wanted through their contract sources, so they shop for the balance on the spot market. Since there are more buyers than sellers, spot prices invariably raise higher than contract prices.

When the prices change from one state of affairs to the other then it is safe to assume that Continue reading “Is the DRAM Market Entering a Shortage?”

Intel to Use Micron Hybrid Memory Cube

Intel and Micron today announced that the new version of Intel’s Xeon Phi, a highly parallel coprocessor for research applications, will be built using a custom version of Micron’s Hybrid Memory Cube, or HMC.

This is only the second announced application for this new memory product – the first was a Fujitsu supercomputer back in November.

For those who, like me, were unfamiliar with the Xeon Phi, it’s a module that uses high core-count processors for problems that can be solved with high degrees of parallelism. My friend and processor guru Nathan Brookwood tells me Continue reading “Intel to Use Micron Hybrid Memory Cube”

Did SK hynix Beat Samsung to the 8Gb LPDDR4?

Every so often something very strange happens that puzzles The Memory Guy. On December 29 (or Dec. 30 in Seoul) something odd occurred.

I received two e-mails, one from SK hynix at 3:55 PM Pacific Time, and one from Samsung exactly one hour later. Both were press releases.

The SK hynix release was titled: “SK Hynix Developed the World’s First Next Generation Mobile Memory LPDDR4”. It announced that the company is sampling its 20nm-class 8Gb LPDDR4 DRAM to customers.

The Samsung release was Continue reading “Did SK hynix Beat Samsung to the 8Gb LPDDR4?”

Rambus and Micron Sign License Agreement

The following is excerpted from an Objective Analysis Alert that can be downloaded from the company’s website.

Rambus and Micron announced on Tuesday that they have signed a patent cross license agreement. Micron receives rights to Rambus IC patents, including memories. Both Micron and Elpida products will be covered. The companies have thus settled all outstanding patent and antitrust claims in their 13-year court battle.

Micron will make royalty payments to Rambus of up to $10 million per quarter over the next seven years, totaling $280 million, after which Micron will receive a perpetual, paid-up license.

Rambus and Micron both have Continue reading “Rambus and Micron Sign License Agreement”

Micron Announces Processor-In-Memory

During the Supercomputing Conference in Denver today Micron Technology announced its new twist on processing: A DRAM chip with an array of built-in processors.

Dubbed: “The Automata Processor” this chip harnesses the inherent internal parallelism of DRAM chips to support a parallel data path of about 50,000 signals to attain processor-DRAM bandwidth that can only be dreamed of using conventional DRAM interfaces. The processor is a Graph-Oriented architecture.

The chip lends itself to Continue reading “Micron Announces Processor-In-Memory”