Memory Markets

XMC Breaks Ground for 3D NAND Fab

2015 XMC campus

China foundry XMC has broken ground for its new 3D NAND flash fab, the country’s first China-owned 3D NAND flash facility.  Plans for this fab were publicly disclosed over a year ago.  Simon Yang, XMC’s CEO, gave a presentation at SEMI’s Industry Strategy Symposium (ISS) on January 11, 2015 in which he detailed the need for China to produce a larger proportion of its overall chips, explaining how his company would help make that happen.

Yang used the map in this post’s graphic to show that XMC has enough land on its campus for six 300mm wafer fabs.  Two shells (yellow), each capable of processing 30,000 wafers per month, had been constructed by that time: Fab A (left) was already fully utilized, and Fab B (right) was ready for tooling.  The gray boxes show that the site has enough space to build 2 additional 2-line megafabs, each with a capacity of up to 100k wafers per month.  Accoding to DRAMeXchange XMC currently produces 20,000 wafers of NOR flash per month.  A March 30 China Daily article reports that monthly wafer production will reach 300,000 in 2020 and 1 million in 2030.

XMC’s formal name is Wuhan Xinxin Semiconductor Manufacturing, and it is located Continue reading

Toshiba Restructuring: New 3D Fab Coming

Toshiba Yokkaichi Fab ComplexBeleaguered Toshiba finally unveiled its restructuring plan on Friday.  The plan aims to return the company to profitability and growth through management accountability.

A lot of the presentation focused on the memory business, a shining star of the Toshiba conglomerate, which has so far included appliances, nuclear power plants, and medical electronics.

Toshiba has big plans for its Semiconductor & Storage Products Company, calling it “A pillar of income with Memories as a core business”.  The company plans to enhance its NAND flash cost competitiveness by accelerating development of BiCS (Toshiba’s 3D NAND technology) and by expanding its SSD business.   There are three parts to this effort:

  1. Grow 3D NAND production capacity
  2. Speed up 3D NAND development
  3. Increase SSD development resources

This post’s graphic is an Continue reading

How NAND Flash Can Reduce DRAM Requirements

Benchmarks show NAND advantage over DRAM in PCsIn a comment to a recent Memory Guy post I stated that NAND flash can reduce DRAM requirements, even in PCs.  Some readers have told me that they wonder how this could be, so I will write this post to explain.

Some years ago Objective Analysis noticed that clever server administrators were able to use SSDs to reduce their systems’ DRAM requirements.  Not only did this save them money, but it lowered power and cooling requirements as well.

Thinking that this might work on other kinds of computers, we commissioned a number of benchmarks to be performed on a PC.

These benchmarks found that after a system already has a certain minimum amount of DRAM, users can get a bigger performance boost by adding a dollar’s worth NAND flash than they can get by adding a dollar’s worth of DRAM.

In every case the minimum amount of DRAM was very small.

This benchmark data was compiled, written up, and explained in depth in the report: How PC NAND Will Undermine DRAM, which can Continue reading

DRAM Prices Down, But Not So Bad

DRAM Spot Price per GB HistoryFor the past ten months DRAM prices have been undergoing a steady slide.  Is the market in a crisis?  Not really!

Today’s low spot price of $4.30/GB puts us on a par with February 2013, a full two years ago (see chart).  DRAM makers have done a lot to reduce their production costs since that time, so their margins this quarter will be much better than they were in the first quarter of 2013.

But we are still a very long way from the bottom of the last market downturn.  In late 2012 spot prices reached a low of $2.52/GB, a full 41% lower than today’s lowest spot prices.

The Memory Guy models the production costs of leading memory chips, and DRAM manufacturing costs have been decreasing for the past several years at an average annual rate of about 30%.  That means that costs today are about half of what they were two years ago, and one third of their level this time in 2012.

So even though today’s Continue reading

New Algorithm Dramatically Reduces Storage & Power Requirements

April Fool in BinaryA lone inventor has developed a data compression algorithm that defies the theoretical “Shannon Limit“.  The press hasn’t covered this recent news, even though it has dramatic implications.  This is probably because the technique is so very arcane.  The inventor is none other than the great-great-great granddaughter of the inventor of the tabulated punch card, Herman Hollerith.

The algorithm reduces most of the data while converting the remaining information into as many ones as possible.  This not only shrinks storage requirements and costs, but in the case of flash memory, it also has an important impact on total power.  Flash is erased by setting all bits to ones, and bits are written by either leaving them alone (one) or by changing them (zero).  The fewer zeros in the code, the less energy required to change the bits.  Energy is also saved during an erase, since fewer bits need to be brought back to the erased state.

To explain the algorithm in its simplest terms, a byte of data is evaluated.  If it has more zero bits than one bits the byte is inverted and an index bit is set to reflect this fact.  Next, the four bits on either side of the byte are evaluated and if one has more zeros than ones it is inverted and another index bit is set.  This process continues until Continue reading

Semiconductor Market Ends Year on a High Note

SIA LogoThe Semiconductor Industry Association this week announced the year-end World Semiconductor Trade Statistics (WSTS) revenues for 2014.  Worldwide sales grew 9.9% to reach a record total of $335.8 billion, outperforming the WSTS fall forecast.  Annual sales increased in all four regional markets for the first time since 2010. Memory was the fastest growing segment, increasing 18.2%, partly based on DRAM growth of 34.7%.It’s encouraging that all geographical areas experienced growth.  This implies that the world economy is finally on the mend.

The industry’s 9.9% worldwide growth was a good bit lower than Objective Analysis’ December 2013 prediction of growth in excess of 20%.  We admit that we overshot, expecting both higher bit growth and stronger pricing in DRAM and NAND flash than actually materialized.

The $335.8 billion number is really Continue reading

Backing Out DRAM Process Rules

Inotera HQInotera recently announced earnings and posted an impressive 55% gross margin.  Inotera is a pure-play DRAM maker, so it’s not too difficult to estimate the company’s process geometries based on its financials.

The Memory Guy thought it might be interesting to determine what I could from the 55% gross margin number.

First of all we can estimate Inotera’s manufacturing cost/GB based on the gross margin and an assumption about the company’s sales price/GB.  The WSTS price per gigabyte for November was $7.83.   Assuming that Inotera’s ASP was equal to this number, then at a gross margin of 55% the company’s cost/GB would have been $3.52.

Inotera’s acts as a foundry for Micron Technoogy.  If Inotera sold to Micron at some lower price, then Inotera’s production costs would necessarily be proportionally lower to maintain the same gross margin.

Using the WSTS price: At a processed wafer cost of $1,600 (my rule of thumb) a $3.52/GB cost would require 454 8Gb dice to be produced Continue reading

Memory Issues in Space & Medical Applications

How an alpha particle disrupts a memory bitThe Memory Guy was recently asked about using memories in a satellite. What would be a good technology to use in a space application?

The problem with space is that there is a lot of radiation.  Radiation on the earth’s surface is lower because it is stopped by the atmosphere, but in space there is an abundance of radiation that interferes with most semiconductors.  Radiation is also a concern in certain medical applications where a memory must maintain its contents while undergoing sterilization through irradiation.  Experiments on conventional flash memories have shown data loss at only 2% of the Continue reading

3D NAND’s Impact on the Equipment Market

Costs to Migrate to Next Lithography Node - Applied Materials (click to enlarge)A very unusual side effect of the move to 3D NAND will be the impact on the equipment market.  3D NAND takes the pressure off of lithographic steps and focuses more attention on deposition and etch.  The reason for going to 3D is that it provides a path to higher density memories without requiring lithographic shrinks.

This sounds like bad news for stepper makers like ASML, Canon, and Nikon while it should be a boon to deposition and etch equipment makers like Applied Materials, Tokyo Electron, and Lam Research.

In its summer 2013 V-NAND announcement, Samsung explained that it would be Continue reading

Micron Announces Processor-In-Memory

Micron's Automata Processor on a standard DDR3 DIMM (Micron press photo)During the Supercomputing Conference in Denver today Micron Technology announced its new twist on processing: A DRAM chip with an array of built-in processors.

Dubbed: “The Automata Processor” this chip harnesses the inherent internal parallelism of DRAM chips to support a parallel data path of about 50,000 signals to attain processor-DRAM bandwidth that can only be dreamed of using conventional DRAM interfaces.  The processor is a Graph-Oriented architecture.

The chip lends itself to Continue reading