The Memory Guy Blog - Jim Handy, Objective Analysis, on Semiconductor Memories

What is a “Multilayer Cell”?

From time to time I get questions from investors in the memory business asking: “What is a multilayer cell?”

The answer is: “There is no such thing: It’s a misstatement.”

The term “MLC” has, by a number of people, been mistranslated to “multi-layer cell.” The misunderstanding appears to have originated in the financial community. People in the flash memory business never use the term at all.

Yes, we talk about MLC, but to us the term means “multilevel cell”.

A multilevel cell is a cell that uses varying voltage levels to represent different states. With four voltage levels the resulting four states on a single cell can be turned into Continue reading “What is a “Multilayer Cell”?”

The Father of Flash Memory

At the Flash Memory Summit in August I had the honor of awarding Fujio Masuoka, the inventor of both NAND and NOR flash, the Flash Memory Summit Lifetime Achievement Award. This award is given to the giants of the flash memory industry to acknowledge their contributions.

Dr. Masuoka first described NOR flash at the 1984 International Electron Device Meeting (IEDM) in San Francisco, and NAND flash at the same venue in 1987. His paper “A new flash EEPROM cell using triple polysilicon technology” introduced a technology that is now used everywhere.

The award has also been given to Intel’s Flash team who brought the first commercial products to the market, and SanDisk co-founder Eli Harari, for devising a way to manufacture a floating gate.

David Schwaderer made a video of the presentation and posted it HERE. Have a watch!

Micron Announces Processor-In-Memory

During the Supercomputing Conference in Denver today Micron Technology announced its new twist on processing: A DRAM chip with an array of built-in processors.

Dubbed: “The Automata Processor” this chip harnesses the inherent internal parallelism of DRAM chips to support a parallel data path of about 50,000 signals to attain processor-DRAM bandwidth that can only be dreamed of using conventional DRAM interfaces. The processor is a Graph-Oriented architecture.

The chip lends itself to Continue reading “Micron Announces Processor-In-Memory”

DRAM Inventor Wins Kyoto Prize

This year’s Kyoto Prizes included an Advanced Technology Prize for the father of DRAM, IBM’s Dr. Robert Dennard.

The Kyoto Prize, one of the world’s most prestigious accolades, is an international award bestowed once a year by The Inamori Foundation to honor those who have contributed significantly to the scientific, cultural and spiritual betterment of humankind. Some say it is similar to the Nobel Prize, and seven Kyoto Prize laureates have gone on to win the Nobel Prize.

In addition to the kudos of receiving this honor, Denning was also Continue reading “DRAM Inventor Wins Kyoto Prize”

SIA: Memories Drive Record Semi Revenues

The SIA yesterday released the WSTS semiconductor sales data for September. Monthly revenues reached a record $27 billion driving third-quarter revenues to their own record of $81 billion. This was the seventh straight month of semiconductor growth, the first such run-up since 2010.

This quote, by SIA CEO Brian Toohey really caught The Memory Guy’s eye: “Sales of memory products have increased sharply compared to last year and continue to be a major driver of industry growth.”

A lot has been happening to drive this increase in memory revenues: The recent SK hynix fire increased DRAM prices, but Continue reading “SIA: Memories Drive Record Semi Revenues”

Hynix Recovery – Not so Soon?

During SK hynix’ October 29 earnings call the company further clarified the status of its Wuxi fab line that was hit by a fire on September 4. In brief, the company may miss its expected end-November date to recover to full operation.

Interestingly, although DRAM bit shipments declined by 2% because of the fire, revenues increased by 3% thanks to price increases caused by the resulting tight DRAM supply. This gave the company a revenue boost taking total semiconductor revenues from ₩3.93 trillion ($3.54B US) in the second quarter to ₩4.08 trillion ($3.66B US) in the third quarter. Not only was this revenue a record number for SK hynix, but margins also reached a record high.

All in all, it was a very good quarter, despite the fire, and perhaps because of it.

The company disclosed that restoration of the air ventilation system and the clean room have been Continue reading “Hynix Recovery – Not so Soon?”

Why Facebook Can’t Get its Dream Memory Chip

During the Flash Memory Summit last August Facebook’s Jason Taylor, Director of Capacity Engineering and Analysis, asked in his keynote speech for a flash chip with dramatically lower cost per gigabyte, saying that he would readily give up speed and endurance to achieve this lower cost. Taylor called this “Cold Flash” and said he was willing to use something that was “Write Once, Read Many” or WORM for data that was unlikely to change over its lifetime. He said this was Facebook’s “Ask of the Industry.”

That same sentiment was echoed yesterday at Samsung’s Memory Solutions Forum by eBay’s Distinguished Engineer and Technologist Roark Hilomen, who said that he could live with 1/3rd the number of writes that normal flash supports as long as he could get it for 1/4 the price.

Unfortunately this is simply not possible.

Let’s do a little math to understand Continue reading “Why Facebook Can’t Get its Dream Memory Chip”

Hynix Squeaks Out Another Update

In its own uniquely minimalistic style, Hynix has updated the status of the second line of its Wuxi fab, the one that was hit by a fire on September 4:

We would like to provide the following update on the recovery status of SK Hynix Wuxi fab that was affected by the fire on Wednesday September 4, 2013. The air ventilation system and cleanroom in the line that was affected by the fire have now been substantially restored, and we have resumed partial utilization in this line from Thursday October 10, 2013. We will gradually raise utilization and make every effort to recover normalized level of pre-fire utilization in November as planned.

This statement should put to rest Continue reading “Hynix Squeaks Out Another Update”

Micron Samples Hybrid Memory Cube

Today Micron Technology announced that it is sampling the Hybrid Memory Cube (HMC) a DRAM packaging technology that it has been working on with the HMC Consortium.

Micron has been pushing to rapidly advance the HMC’s development and seems to have reached this point in an impressively brief time, given the complexity of the technology. It has only been two years since the first public appearance of the HMC at the 2011 Intel Developer Forum.

Some pretty advanced technology was used to make this product. DRAM processes are not very good at Continue reading “Micron Samples Hybrid Memory Cube”

Samsung’s View on Charge Trap Flash

At the Flash Memory Summit yesterday ES Jung, PhD, EVP & GM for the Samsung R&D Center, explained the inner workings of Samsung’s new V-NAND vertical NAND flash technology. I will shortly be writing a series to explain what a 3D NAND is since there is little on the web that gives clear details about the technology.

One key attribute of most 3D NAND approaches is the use of a charge trapping layer. This has to do with the difficulty of manufacturing sideways floating gates.

Dr Jung delighted the show’s audience by explaining that a standard floating gate is like Continue reading “Samsung’s View on Charge Trap Flash”