The Memory Guy Blog - Jim Handy, Objective Analysis, on Semiconductor Memories

Samsung’s Aquabolt-XL Processor-In-Memory (Part 2)

Samsung has been strongly promoting its “Aquabolt-XL” Processor-In-Memory (PIM) devices for the past year. In this second post of a two-part series The Memory Guy will present other companies’ similar PIM devices, and will discuss the PIM approach’s outlook for commercial success.

Part 1 of this series explains the concept of Processing in Memory (PIM), details Samsung’s Aquabolt-XL design, and shares some performance data. It can be found HERE.

Samsung’s Not the First PIM Maker

This is not at all the first Continue reading “Samsung’s Aquabolt-XL Processor-In-Memory (Part 2)”

Samsung’s Aquabolt-XL Processor-In-Memory (Part 1)

For the past year, since ISSCC in February 2021, Samsung has been strongly promoting its “Aquabolt-XL” Processor-In-Memory (PIM) devices. In this two-part post The Memory Guy will explain the Aquabolt-XL architecture, its performance, other companies’ similar devices, and discuss the PIM approach’s outlook for commercial success.

Processing in memory is not a Continue reading “Samsung’s Aquabolt-XL Processor-In-Memory (Part 1)”

Introducing New Objective Analysis Briefs

Although Objective Analysis has published its “Brief” format white papers for some time, this line has never received the focus that it deserves. To remedy that, we are taking the most interesting and timeless of the Insights that we have published on membership website Smartkarma and providing them to our friends for a reasonable price.

The Brief is a very short report format used to make a succinct Continue reading “Introducing New Objective Analysis Briefs”

Did Samsung Just Endorse YMTC’s Xtacking?

During his December 15 IEDM keynote speech, Samsung Electronics Chairman Kinam Kim really surprised me. He spoke favorably of the approach that YMTC is using to produce 3D NAND flash.

This approach, which YMTC named “Xtacking,” involves the use of two separate wafers to manufacture a 3D NAND chip. The brief way to describe it is to say that Continue reading “Did Samsung Just Endorse YMTC’s Xtacking?”

What Exactly IS “Storage Class Memory”?

If you ask any two people in the computing industry to define the term “Storage Class Memory” you’re likely to get three or more answers. That’s because the term isn’t well defined anywhere.

Some people use it for emerging memory technologies like MRAM, ReRAM, FRAM, and PCM/XPoint. Others include NAND flash, even in the form of Continue reading “What Exactly IS “Storage Class Memory”?”

Video: The Inner Workings of SiO ReRAM

This post shares a new and entertaining animation by Charlotte Streeter that offers one interpretation of the inner workings of one type of SiO-based nonvolatile memory like those described in Ron Neale’s most recent post on The Memory Guy.

The video links the observed electrical characteristics to the structural Continue reading “Video: The Inner Workings of SiO ReRAM”

Could Intel’s PowerVia Lower HBM Costs?

Intel has recently announced a technology that the company calls PowerVia that could inadvertently help reduce the cost of HBM – high-bandwidth memory.

HBM is a stack of up to twelve DRAM chips that are interconnected using over one thousand TSVs – Through-Silicon Vias. These are metal-filled holes etched right through the DRAM die to allow signals to move vertically through the chip. It’s an alternative to more conventional wire bonding.

HBM sells for significantly more than Continue reading “Could Intel’s PowerVia Lower HBM Costs?”

Weebit-Nano’s First Small Steps on the NV Memory Road

In this post contributor Ron Neale analyzes Weebit Nano’s recently-announced memory array, based on SiO and an Ovonic Threshold Switch selector developed by CEA-Leti in France. Ron employs his extensive background in Ovonic devices to try and sleuth out the characteristics of both the memory element and the selector, and to understand some of the inner workings of the cell.

Weebit-Nano (Hod Hasharon, Israel), have recently reported some first steps on the path they have outlined to meet their bold claim of Continue reading “Weebit-Nano’s First Small Steps on the NV Memory Road”

New Report: Emerging Memories Take Off

The Memory Guy is pleased to announced the release of a new report by Objective Analysis and Coughlin Associates: Emerging Memories Take Off.

The report is the 2021 update of our popular 2020 emerging memories report, and includes detailed technology profiles of MRAM, ReRAM, FRAM, PCM/XPoint and other technologies, profiles of Continue reading “New Report: Emerging Memories Take Off”