Chalcogenide

Monatomic PCMs: A New Direction

Ron NealeUntil now designers of PCM devices have tried to make PCM meet their expectations by experimenting with an almost infinite number of possible multi-element glass compositions, in order to tinker with or emphasise a particular composition-related device characteristic. The apparent advantage of this great variety of materials comes with the baggage of reliability and performance-compromising element separation, driven by the forces of electro-migration, electrostatic effects and phase separation.

Is it possible to cast aside the problems of the multi-element PCM compositions and look at the possibility of monatomic PCMs?  For a team at IBM, Zurich and Aachen University the answer is an unequivocal “Yes!” and recently they have published details of the remarkable progress they have made with amorphous antimony (Sb), as an initial candidate element. This research was published in a June 2018 paper in Nature Materials Letters titled: Monatomic phase change memory, by Martin Salinga et al, IBM and Aachen University).

A difficulty faces those venturing in this new direction: While it is possible to bring many elements to the amorphous state, they very quickly crystallize at room temperature and higher.  The IBM researchers used simulations to find that the keys to obtaining a stable amorphous state is to control the quenching rate and the volume of the sample. That part of the antimony research is underpinned by some very impressive simulations that use only about 200 atoms.

Here’s the issue that this approach Continue reading

IBM Jumps on the “New Memory” Bandwagon

IBM's 3-Bit PCM Read AlgorithmAt a technical conference hosted by the IEEE this week IBM announced the results of nearly a decade of research in which its scientists have been investigating the emerging technology known as “Phase Change Memory” (PCM).  The scientists presented a means of successfully storing three bits per cell for the first time, while also addressing all of PCM’s challenging idiosyncrasies, including resistance drift and temperature drift.

Commonly referred to by the erroneous nickname “TLC” for Triple Level Cell, this technology squeezes three bits of data into the space of a single bit, essentially cutting the cost per gigabyte to about one third of that of a standard memory chip making it closer in cost to flash.

With this step IBM expects to help drive a new memory layer into existence, one that will fit between the cheap and slow NAND flash used in SSDs and the fast but expensive DRAM used for main memory.  Such a layer would improve the cost/performance of all types of Continue reading