IEDM - The Memory Guy Blog

Observations on the “Universal Law” for NV Memory Cells

Photo of Ron Neale, Renowned Phase-Change Memory Expert Ron Neale returns to The Memory Guy blog to discuss a “Universal Law” about memory elements and selectors that was presented by CEA Leti at the IEEE’s 2019 IEDM conference last December.

At IEDM 2019 D. Alfaro Robayo et al presented a paper titled: Reliability and Variability of 1S1R OxRAM-OTS for High Density Crossbar Integration that had a rather interesting claim of a “Universal Law”. It is possible that some links to the past might help to provide an explanation for Continue reading “Observations on the “Universal Law” for NV Memory Cells”

NV Stacked Memory: Selectors and Forming (Part 1)

In this first post of a five-part series contributor Ron Neale analyzes selector technologies presented by CEA Leti at the 2018 IEDM conference last December.

At the close of last year the IEDM maintained its long-standing reputation for offering across-the-board the right focus at the right time on important and key parts of the electronic device discipline. For those with an interest in the future of stacked or 3D NV-memory arrays there were a number of important papers and presentations on a variety of thin film memory selectors or matrix isolation devices (MIDs).

Important, because as the move towards stacked memory arrays for storage class memory (SCM) and persistent memory (PM) applications gains momentum, the thin film selector may be the device which is key in determining the performance and reliability for a number of different types of NV memory arrays or even the very existence of that type of memory array. One of the important and poorly understood variables in the mix is the selector forming voltage and the structural changes which lead from it to the operating device threshold voltage which, in my view needs a lot more by way of detailed understanding.

As the memory array moves into Continue reading “NV Stacked Memory: Selectors and Forming (Part 1)”

The Father of Flash Memory

At the Flash Memory Summit in August I had the honor of awarding Fujio Masuoka, the inventor of both NAND and NOR flash, the Flash Memory Summit Lifetime Achievement Award. This award is given to the giants of the flash memory industry to acknowledge their contributions.

Dr. Masuoka first described NOR flash at the 1984 International Electron Device Meeting (IEDM) in San Francisco, and NAND flash at the same venue in 1987. His paper “A new flash EEPROM cell using triple polysilicon technology” introduced a technology that is now used everywhere.

The award has also been given to Intel’s Flash team who brought the first commercial products to the market, and SanDisk co-founder Eli Harari, for devising a way to manufacture a floating gate.

David Schwaderer made a video of the presentation and posted it HERE. Have a watch!