Memory

Intel’s Optane DIMM Price Model

With Intel’s Cascade Lake rollout last month came with a co-introduction of 3D XPoint Memory in a DIMM form factor, the Optane DIMM that had been promised since the first introduction of 3D XPoint Memory in mid-2015.  A lot of benchmarks were provided to make the case for using Optane DIMMs (formally known as the Intel Optane DC Persistent Memory), but not much was said about the pricing, except for assertions that significant savings were possible when Optane was used to replace some of the DRAM in a large computing system.

So…  How much does it cost?  Well certain technical reports in resources like Anandtech probed sales channels to see what they could find, but The Memory Guy learned that the presentations Intel made to the press in advance of the Cascade Lake rollout contained not only prices for the three Optane DIMM densities (128, 256, & 512GB), but also provided the prices of the DRAM DIMMs that they were being compared against.  I’ll get to that in a moment, but first let’s wade through the fundamentals of Intel’s Optane pricing strategy to understand why Intel has needs to price it the way that it has.

In Objective Analysis’ report on 3D XPoint Memory, and in several presentations I have Continue reading

What’s Inside an Optane DIMM?

Part of Optane DIMM LogoWith the release of its Cascade Lake family of processors today (formally called the “2nd Generation Intel Xeon Scalable processor”) Intel disclosed more details about its Optane DIMM, which has been officially named the “Intel Optane DC Persistent Memory.”  This DIMM’s architecture is surprisingly similar to an SSD, even to the point of its having error correction and encryption!

The Memory Guy doesn’t generally cover SSDs, but I do cover DIMMs, so this is one of those posts that I could have put into either of my blogs: The Memory Guy or The SSD Guy.  I have decided to put it here with the hopes that it will be easier for members of the memory community to find.

The internal error correction, the encryption, and the fact that 3D XPoint Memory wears out and must use wear leveling, all cause the Optane DIMM’s critical timing path to be slower than the critical path in a DRAM DIMM, rendering the Optane DIMM unsuitable for code execution.  This, and the fact that XPoint writes are slower than its reads, all help to explain why an Optane DIMM is never used as the only memory in a system: there is always a DRAM alongside the Optane DIMM to provide faster Continue reading

Toshiba Decides to Split Off Memory Business

Toshiba Revenue HistoryIn a letter to shareholders released today, Toshiba finally clarified its plans for restructuring the company.  Since January 18 there have been numerous rumors that Toshiba planned to spin its memory business off or sell it outright.  Today’s letter indicates that this hasn’t been decided yet.  In fact, other than to call a late March shareholder vote and to reveal a restructuring, the letter discloses extraordinarily little.

In a nutshell Toshiba has decided to isolate the memory business (including the SSD business but not the HDD and image sensor businesses) into a separate wholly-owned subsidiary.  There was no mention of either the recently-shrinking Discrete business or the System LSI business, which has been in a steady decline for the past decade.  Click on this post’s graphic to see how each of the company’s semiconductor businesses has been doing.

The intent appears to be to groom the subsidiary to be spun off or sold, but this has not been expressly stated.  Instead Toshiba simply states that: “The Company is still considering various structures with a view to an injection of third-party capital.”

The letter reiterates Toshiba’s prior position that the memory business Continue reading

What is a Content-Addressable Memory (CAM)?

This is not the kind of CAM the post is about!What is a Content-Addressable Memory (CAM)?  The Memory Guy decided to post this after having recently run across a very strange web post HERE that erroneously inferred that CAM chips from NEC could be a threat to NAND-based SSDs.  The article was based on a press release from NEC and Tohoku University that can be read HERE.

It’s not at all surprising that the release was misunderstood – it’s very awkwardly written:

The new CAM utilizes the vertical magnetization of vertical domain wall elements in reaction to magnetic substances in order to enable data that is processing within the CAM to be stored on a circuit without using power.

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