Scale economies are an essential component to the success of a memory manufacturer, yet The Memory Guy finds that very few executives in the industry truly understand them. This mechanism may be the single most important issue in introducing a new memory technology to the market.
In this post I will walk through that concept, giving real examples to show where the phenomenon has led to the success and failure of a couple of technologies. The text is simply an edited rendition of a chapter on this subject in the New Memories report that Objective Analysis has co-authored with Coughlin Associates, and which is edited and re-published annually. It can be purchased online for immediate download HERE.
Cost Isn’t Just About Die Size
Even if a new memory chip’s die size is smaller than an existing technology, the new memory must reach production levels high enough to drive its manufacturing cost below that of the incumbent technology that it hopes to replace. This is critically important to the success of a technology, and is something of a “Chicken-and-Egg” issue: If the product is to reach high unit volume, then its cost must be lower than that of competing technologies, yet its cost will be high unless it is produced in high volume.
A prime example of this is planar NAND flash, which had a theoretical cost advantage over DRAM that didn’t materialize until high volumes were attained. Here’s how this worked: The cost to manufacture a standard silicon memory chip is expected to be roughly proportional to its die size. The table below compares the die sizes of SLC planar NAND flash and DRAM chips that are produced on similar semiconductor processes and have the same number of bits. SLC NAND (Single-Level Cell) has been chosen since it makes the comparison fairer, and since NAND flash only shipped in this form during its early years.
| Process | DRAM: 1Gb | DRAM: 2Gb | NAND: 4Gb | NAND: 8Gb |
| 54nm | 91mm² | 98mm² | ||
| 93mm² | 163mm² | |||
| 48nm | 29mm² | 145mm² | ||
| 44nm | 52mm² | 117mm² |
The die sizes in this table represent various manufacturers’ production chips, and were either disclosed by the manufacturers or were determined by reverse engineering firms. The NAND flash chips provide about double the number of bits per square millimeter of die area for all of the listed process geometries:
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- At 54nm the die size of a 4Gb NAND flash chip is very close to that of a 2Gb DRAM chip
- At 50nm an 8Gb NAND is less than twice as large as a 2Gb DRAM to give over twice as many gigabits per square millimeter
- A 48nm 8Gb NAND chip is a little more than four times as large as a 1Gb DRAM to, once again, provide about twice as many Gb per square millimeter
- The 44nm 8Gb NAND is slightly larger than twice the size of the 2Gb DRAM, yet it offers four times the density
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This table implies that NAND flash should have cost half as much to produce, and be sold at roughly half as much per gigabyte, as a DRAM chip produced on the same process.
NAND’s Delayed Cost Advantage
What really happened is illustrated in the chart below, which plots a history of the average selling price per gigabyte of NAND flash compared to DRAM. DRAM prices are shown by the black line and NAND flash is red, with the prices on the vertical axis shown using a logarithmic scale. This chart format depicts steady growth as a straight line and makes it easier to compare very small numbers at the far-right side against the very large numbers at the left.
Even though the die size of NAND flash was half that of DRAM on the same process geometry, it wasn’t until 2004 that NAND’s price became as low as DRAM’s price, the point at which the two lines cross.
Shipment Volume is Just as Important
Why did this transition take so long after the introduction of NAND flash? The delay was caused by the economies of scale. NAND flash shipped in much lower volume than DRAM in its early years, and fewer wafers were processed, causing those wafers to be significantly more costly than DRAM wafers.
The next figure provides a visual depiction of the volume difference between these two technologies. As above, the red line represents NAND flash and the black line depicts DRAM. This chart is measured in gigabytes shipped and similarly uses a semilogarithmic format.
In 2004, when NAND’s price crossed below that of DRAM, NAND flash gigabyte shipments were about 1/3rd those of DRAM. Since NAND flash provides twice as many gigabytes per unit area as does DRAM, then this implies that about 1/6th as many NAND flash wafers were produced as DRAM wafers. It would seem fair to assume, then, that a new technology would need to be produced in wafer volumes that were within an order of magnitude of the wafer volumes of an established product for the wafer costs to match.
What Scale Economies Mean to You
What does this tell us about new memory technologies? Since these new memory technologies currently serve niche market applications, their wafer production volume is small. This keeps the cost of these storage technologies high. Technology developments will help to lower the cost, but ultimately the applications for these memories must move from isolated niche markets to more widespread use or their cost will remain much higher than that of their more established counterparts.
By our estimates, Intel’s 3D XPoint wafer volume never rose above 1/120th that of DRAM, preventing the technology from ever matching DRAM’s cost, even though it was promoted as having a die size one tenth as large as DRAM’s. Meanwhile, Intel was selling its 3D XPoint-based Optane products at half of DRAM’s price. This illustrates how difficult it is for stand-alone chips made in a new memory technology to compete against stand-alone memory chips for an established technology.
The analysts at Objective Analysis provide a very important and substantial skill set to corporate strategists: We understand the economic mechanisms that drive the business and we understand the technologies. This adds to our other skills including creative thinking and strategic analysis. Give us a call to discuss ways that we can help your company gain a competitive edge and out-perform the market.