Figuring Out Who Shipped What

Some Companies Count Some Chips and Not OthersToday I saw an announcement from another market research firm about a new report with flash memory market shares for 2011.  I found it remarkable that the way these chips are counted varies enough that the company decided to openly discuss this issue right in the press release for the report!

Memory market statistics are compiled by numerous firms: The World Semiconductor Trade Statistics (WSTS) sold in the US and Europe by the Semiconductor Industry Association (SIA), Gartner Dataquest, IHS iSuppli, Web Feet, Semico, Forward Insights, and even DRAMexchange.  Lots of entities use conflicting definitions of what is and what is not a chip.  This causes each company’s numbers to differ from the others’.

In the case of WSTS, a chip that is packaged with another chip into a board becomes Continue reading “Figuring Out Who Shipped What”

Invensas’ DIMM-in-a-Package

Invensas BGA Dimm-in-a-PackageTessara’s Invensas subsidiary has announced a new packaging technology to produce what the company calls a “DIMM in a Package.”

The new product is said to deliver the capacity and performance of an SO-DIMM in a 16x16mm BGA.  It is built using Invensas’ xFD technology.

I have seen examples of Invensas’ xFD and the first thought that struck me was: “Why didn’t I think of that?!?”  It’s an elegantly simple approach to today’s connection conundrums.  By staggering chips and mounting them face-down over holes for bonding wires the company connects DRAMs with far shorter interconnect lengths and less scrambling, leading to higher performance.

Although this technology is not yet covered in any of our current reports, we do have a report on cell phone packages: Flash Packaging: What Phone Makers Want and Why, that can be purchased for immediate download on the Objective Analysis website.

MOSAID Samples 333GB/s HLNAND

MOSAID HLNAND Samples: 512Gb at 333MB/sMOSAID announced that the company is sampling a 333GB/s 512Gb HLNAND.  According to MOSAID the devices packages: “16 industry standard 32Gb NAND Flash die with two HLNAND interface devices to achieve 333MB/s output over a single byte-wide HLNAND interface channel. Conventional NAND Flash MCP designs cannot stack more than four NAND dies without suffering from performance degradation, and would require two or more channels to deliver similar throughput.”

Think of this as a lower-cost NAND version of the Hybrid Memory Cube, which packages specialized DRAM using thousands of through-silicon vias (TSVs) atop a specialized interface.  Both approaches use a custom logic chip to quickly move data across a point-to-point interface with the processor.

There were a couple of surprises with this announcement: First that it was made by MOSAID even though the company was acquired by Sterling Partners late last year.  It would seem that the announcement would have borne the acquirer’s name.

Second, the press all remarked that the device was innovative since it was a 16-die NAND stack.  This is not new!  Samsung has been shipping 16-die NAND stacks for a couple of years now.  Although it’s not an economical package, it’s in production.

MOSAID first introduced the HLNAND architecture in 2007.  The Memory Guy has never fully understood how HLNAND fit in with the rest of MOSAID’s business.  For the most part MOSAID has become a licensor and acquirer of IP, a departure from its origins as a chip design consultancy.  It is unusual (but not unheard of) for such a company to champion an industry standard and to do much R&D on its own.

Either way, this is an impressive device with compelling throughput.  Here’s a wish for MOSAID to successfully create a market for this technology.

WIOMING: Another Spin on the Hybrid Memory Cube

ST-Ericsson & CEA-Leti WIOMING Multichip ModuleAt a Conference in San Francisco today (Tuesday December 13 ) ST-Ericsson and CEA-Leti presented a paper on something the companies called a: “Breakthrough 3DIC with Wide I/O Interface.”

This product appears to be a variation on the Hybrid Memory Cube, or HMC concept detailed in a prior post.

Remember that the HMC stacks a number of DRAM chips atop a logic chip.  The memories store data and communicate to the logic chip through thousands of through-silicon vias (TSVs) while the logic chip handles communications with the outside world. Continue reading “WIOMING: Another Spin on the Hybrid Memory Cube”

IBM to Build Micron Hybrid Memory Cube

Conceptual Cutaway Drawing of the Hybrid Memory CubeIn a December 1 press release IBM announced that the company will be manufacturing Micron Technology’s Hybrid Memory Cube (HMC) which IBM claims to be “the first commercial CMOS manufacturing technology to employ through-silicon vias (TSVs).”

This device is one that Altera, Intel, Micron, Open Silicon, Samsung, and Xilinx have all presented recently as a plausible solution to the difficulty of increasing the speed of DRAM/processor communications.  The Hybrid Memory Cube Consortium (HMCC) website offers a deep dive into the details of the consortium and the technology.

Continue reading “IBM to Build Micron Hybrid Memory Cube”