NAND Flash - The Memory Guy Blog

SanDisk’s Amazing 512GB SD Card

SanDisk has introduced an SD Card with a whopping 512 gigabytes of storage. Noting that SD Card capacities have increased by 1,000 times over the past ten years, from 512MB to 512GB, the company says that this product is aimed at professional HD videographers (who can justify its $800 price) allowing them to shoot Raw-format footage without shutting their cameras off, which could potentially allow them to miss a magic moment.

To The Memory Guy this represents an amazing piece of packaging technology. Let’s see why:

In 2003 SanDisk’s 512MB card contained Continue reading “SanDisk’s Amazing 512GB SD Card”

Cheesecake and Floating Gates

One of the more fun aspects of last week’s Flash Memory Summit was the presentation of the Lifetime Achievement Award. This is something that the show’s management has allowed me to do for the past four events.

This year’s award went to Dr. Simon Sze, who co-invented the floating gate transistor (the basis for all flash, EEPROM, and EPROM) at Bell Labs back in 1967.

Sze and his partner Dawon Kahng were finishing lunch in the company cafeteria with a cheesecake dessert. The two discussed what would happen if a MOSFET was built with extra layers like the layers in the cake. Their intent was to use semiconductors to replace Continue reading “Cheesecake and Floating Gates”

Making 3D NAND Flash – Animated Video

The good people at Coventor have graciously allowed me to post their video of the Pipe-Shaped BiCS 3D NAND flash process onto The Memory Guy blog site. Click the image to see it play out.

Coventor tells me that they are the leading Continue reading “Making 3D NAND Flash – Animated Video”

Samsung Begins Operations at its Xi’an Fab

Samsung has announced that the company’s newest memory fabrication plant (Fab) in Xi’an, China has “begun full-scale production operations”, adding that: “The new facility will manufacture Samsung’s advanced NAND flash memory chips: 3D V-NAND.”

I immediately asked whether the plant will build products other than 3D NAND, and the company has replied that this will be the only product produced in the Xi’an plant. What Samsung has not said is what is meant by “full-scale production operations.” Typically wafer fabs start with a very low production capacity as new tools are being qualified, only ramping to high-volume production a year or more after initial production.

Samsung points out that production has begun a mere 20 months after initial groundbreaking, which is quite Continue reading “Samsung Begins Operations at its Xi’an Fab”

Comparing Samsung V-NAND to Micron 16nm Planar NAND

I was recently directed to a very interesting blog post written by 3D technologist Andrew Walker of Schiltron in which he compares two NAND flash chips that were presented at the IEEE International Solid State Circuits Conference (ISSCC) on February 12.

The post, titled Samsung’s V-NAND Flash at the 2014 ISSCC: Ye Distant Spires… is on the 3D InCites website.

Dr. Walker puts a lot more time and effort into his graphic representations of 3D NAND chips than do others (The Memory Guy included) and this makes it much easier to understand the issues he points out. He shows us that Samsung’s 3D NAND cell is about 5 times the size of a 40nm planar NAND cell and about 30 times that of Micron’s 16nm planar cell, and that the 3D NAND’s physical area is unlikely to change with any future 3D technology generations.

For this and other reasons (given in the article) he states that the Samsung V-NAND is “an impressive achievement but not a realistic foundation for the future.”

After having compiled my series on 3D NAND I can appreciate Dr. Walker’s opinion. This is certainly going to be a difficult technology to master, and it could be quite some time before the cost structure for 3D NAND can compete against that of today’s planar technologies.

Give the Walker post a quick read and judge for yourself whether we are at the brink of a 3D conversion or if this technology can be expected to slip out a few years.

Why NAND is So Difficult to Scale

NAND flash is the process leader in memory technology, and this puts it in a very challenging position: It must ramp to high volume production using techniques that have never been tried before.

The graphic for this post (click to enlarge), supplied by ASML, the semiconductor industry’s leading lithography tool supplier, illustrates the challenge of migrating from one process node to the next. Across the bottom, on the X-axis, are representative process nodes ranging from “2D-45”, or two-dimensional (planar) 45nm NAND, to “3D-5x”, or three-dimensional 5xnm NAND. Below these numbers are the year of volume production.

The vertical axis, labeled “Tolerance” represents the minimum Continue reading “Why NAND is So Difficult to Scale”

NVMdurance – Making NAND Flash Last Longer

Few NAND flash users realize that these chips have a lot of internally-adjusted parameters that are tuned to optimize performance, endurance, and yield. The operation of these parameters is a closely-held secret that flash makers share with very few of their most important customers. Other customers won’t even learn how to access these parameters!

The Memory Guy can’t claim to know what any of the parameters really are, but I have been given the understanding that they control things like the voltage thresholds used to determine which bit is represented on an MLC cell, or how much energy to put into a bit cell when it’s being programmed or erased. I hear that there are hundreds of these parameters, and they are all painstakingly hand-tuned by highly talented experts during a new chip’s characterization phase to assure that the chip will yield to the required specifications. Once the magic set of parameters has been determined, then the parameters of all subsequent chips are set to the same values.

It’s a long and arduous struggle to get the first chip tuned, though.

Some university researchers in Ireland decided that there must be a better way to do this and created Continue reading “NVMdurance – Making NAND Flash Last Longer”

What is a “Multilayer Cell”?

From time to time I get questions from investors in the memory business asking: “What is a multilayer cell?”

The answer is: “There is no such thing: It’s a misstatement.”

The term “MLC” has, by a number of people, been mistranslated to “multi-layer cell.” The misunderstanding appears to have originated in the financial community. People in the flash memory business never use the term at all.

Yes, we talk about MLC, but to us the term means “multilevel cell”.

A multilevel cell is a cell that uses varying voltage levels to represent different states. With four voltage levels the resulting four states on a single cell can be turned into Continue reading “What is a “Multilayer Cell”?”

The Father of Flash Memory

At the Flash Memory Summit in August I had the honor of awarding Fujio Masuoka, the inventor of both NAND and NOR flash, the Flash Memory Summit Lifetime Achievement Award. This award is given to the giants of the flash memory industry to acknowledge their contributions.

Dr. Masuoka first described NOR flash at the 1984 International Electron Device Meeting (IEDM) in San Francisco, and NAND flash at the same venue in 1987. His paper “A new flash EEPROM cell using triple polysilicon technology” introduced a technology that is now used everywhere.

The award has also been given to Intel’s Flash team who brought the first commercial products to the market, and SanDisk co-founder Eli Harari, for devising a way to manufacture a floating gate.

David Schwaderer made a video of the presentation and posted it HERE. Have a watch!

Hynix Recovery – Not so Soon?

During SK hynix’ October 29 earnings call the company further clarified the status of its Wuxi fab line that was hit by a fire on September 4. In brief, the company may miss its expected end-November date to recover to full operation.

Interestingly, although DRAM bit shipments declined by 2% because of the fire, revenues increased by 3% thanks to price increases caused by the resulting tight DRAM supply. This gave the company a revenue boost taking total semiconductor revenues from ₩3.93 trillion ($3.54B US) in the second quarter to ₩4.08 trillion ($3.66B US) in the third quarter. Not only was this revenue a record number for SK hynix, but margins also reached a record high.

All in all, it was a very good quarter, despite the fire, and perhaps because of it.

The company disclosed that restoration of the air ventilation system and the clean room have been Continue reading “Hynix Recovery – Not so Soon?”