Wiley has recently published a new book by Betty Prince titled Vertical 3D NAND Technologies that is one to consider if you want to bring yourself up to speed on recent research behind today’s and tomorrow’s 3D memory technologies.
For those who haven’t previously encountered Dr. Prince, she is the author of a number of key books covering memory design and holds memory patents written over her 30-year career in the field.
The book provides capsule summaries of over 360 papers and articles from scholarly journals on the subject of 3D memories, including DRAM, NAND flash, and stacked chips.
These papers are organized into Continue reading “New Book: Vertical 3D Memory Technologies”
Some time ago The Memory Guy was asked by Numonyx (later acquired by Micron) to put together an online course for EE Times on memory technologies, explaining how each one works and where it is used.
Although the course was very well received, I never posted a link to it on The Memory Guy blog. This post is intended to correct that error.
The course runs 75 minutes and covers the basics of DRAM, non-volatile RAM, SRAM, NAND flash, NOR flash, mask ROM, and EEPROM. It explains each technology’s advances in size, cost and performance, leading up to the development of Continue reading “Fundamentals of Memory – Free Online Course”
Only months after Samsung’s announcement of 3D memory production a new 4-dimensional memory has been prototyped by university researchers. This memory not only has bits in the X and Y dimensions, like planar NAND, and the Z dimension, like 3D NAND, but it also grows in capacity over time, spanning the fourth dimension: time.
This research has been spearheaded by George P. Burdell, Assistant Associate Professor pro tem at Death Valley University. The work is the culmination of a decades-long effort to find a way to increase memory sizes in systems without the need to replace chips or modules.
The team has created the name “Growing RAM” or “GRAM” for the technology. Current prototypes exhibit very favorable Continue reading “Researchers Devise 4-D Memory”
Crossbar, Inc. has come out of stealth mode with a fascinating new alternative memory technology. Furthermore, the company says that a working memory array has been produced at a commercial fab.
Crossbar says that the technology can put a terabyte onto a single chip. The company has already measured filaments as thin as 6nm, and is confident that it can be shrunk further and that it will support multilevel cells.
Crossbar’s device is a silver filament ReRAM with a difference. For one, the silver filaments are in standard silicon dioxide, probably the most Continue reading “Crossbar’s Radical New Memory Technology”
In a new cross-disciplinary effort, researchers have developed a novel approach to attach bonding wires to stacks of memory chips. The new technique, being called a “breakthrough” by its developers, promises to allow chips to be stacked to several times their current 8-chip and 16-chip heights.
At issue is the challenge of precisely bonding wires a fraction of the diameter of a human hair over great distances without their inadvertently coming into contact with their neighbors to create a short circuit. Such a short could destroy one or more of the chips in the stack, rendering the entire stack useless. The mechanical means of attaching these wires, although highly sophisticated, still has significant issues, that limit the economics of higher stacks.
Researchers at the Berea University of Geology (BUG) in Berea, Kentucky, noticed that certain Continue reading “New Memory Bonding Technique Shows Promise”
The December issue of the IEEE Spectrum includes a fascinating article about a 100 million cycle flash memory developed by Macronix. The company will present this design at at IEDM this month.
In brief: Macronix’ researchers buried a heater in the array to heat the tunnel dielectric, annealing out the disruptions & traps that might cause a bit to fail.
A prototype has so far been tested more than 100 million cycles and it shows no sign of impending failure. Researchers believe that it is likely to reach one billion or more cycles, but such testing will take several months. This just may be able to Continue reading “Macronix Solves Flash Wear Problem”
EE Times has published a very interesting slideshow called: A Brief History of Memory by Kristin Lewotsky. This is recommended reading for all who peruse of The Memory Guy blog. Even the comments are good reading, with one commenter sharing a history of ferroelectrics that dates back to the 1950s.
It’s interesting to see the Continue reading “History of Memory Slideshow in EE Times”
Everspin today announced that select customers have been sampled the world’s first “ST-RAM” a 64Mb chip using STT MRAM technology, rather than Everspin’s existing production toggle MRAM technology.
For the past decade or so memory researchers have been looking to Spin Transfer Torque (sometimes called “Spin Torque Transfer”) MRAMs as a way of getting to tighter processes than conventional toggle MRAM. It seems that current densities in toggle MRAM rise too high as the process shrinks – at some point the process could no longer scale since chips would burn themselves out during programming. The ST-RAM paves Everspin’s path toward Continue reading “Everspin Samples First STT MRAM”
It’s not often that a small private firm acquires a part of a larger public firm, but that’s what happened today with Atmel and Adesto. Adesto, a manufacturer of alternative memory technology, has purchased Atmel’s serial NOR flash business for an undisclosed sum.
The transaction covers the Atmel “Data Flash” and “BIOS Flash” product families and the employees supporting those products. Atmel has retained its Serial EEPROM, Crypto and Digital Temperature Sensor memory product lines and plans to continue to invest in those businesses.
This is not a small thing. Serial NOR now accounts for roughly Continue reading “Adesto Acquires Atmel’s Serial NOR Business”
Lane Mason of Objective Analysis recently shared with The Memory Guy an article he wrote for the 4 April 2007 Denali Memory Report covering Phase Change Memory (PCM or PRAM.) It looked like something big was about to happen with the technology: PCM looked nearly ready to enter production.
The article included an excerpt of an EE Times interview with Micron’s CEO, the late Steve Appleton, in which Appleton stated that PCM advocates threatened to take over the memory market in 2000.
Here it is 2012, and PCM represents little more than a drop in the bucket when it comes to memory sales, although Continue reading “Alternative Memory Technologies Patiently Wait For Market to Explode”