The Memory Guy Blog - Jim Handy, Objective Analysis, on Semiconductor Memories

Intel to Use Micron Hybrid Memory Cube

Intel and Micron today announced that the new version of Intel’s Xeon Phi, a highly parallel coprocessor for research applications, will be built using a custom version of Micron’s Hybrid Memory Cube, or HMC.

This is only the second announced application for this new memory product – the first was a Fujitsu supercomputer back in November.

For those who, like me, were unfamiliar with the Xeon Phi, it’s a module that uses high core-count processors for problems that can be solved with high degrees of parallelism. My friend and processor guru Nathan Brookwood tells me Continue reading “Intel to Use Micron Hybrid Memory Cube”

Making 3D NAND Flash – Animated Video

The good people at Coventor have graciously allowed me to post their video of the Pipe-Shaped BiCS 3D NAND flash process onto The Memory Guy blog site. Click the image to see it play out.

Coventor tells me that they are the leading Continue reading “Making 3D NAND Flash – Animated Video”

Samsung Begins Operations at its Xi’an Fab

Samsung has announced that the company’s newest memory fabrication plant (Fab) in Xi’an, China has “begun full-scale production operations”, adding that: “The new facility will manufacture Samsung’s advanced NAND flash memory chips: 3D V-NAND.”

I immediately asked whether the plant will build products other than 3D NAND, and the company has replied that this will be the only product produced in the Xi’an plant. What Samsung has not said is what is meant by “full-scale production operations.” Typically wafer fabs start with a very low production capacity as new tools are being qualified, only ramping to high-volume production a year or more after initial production.

Samsung points out that production has begun a mere 20 months after initial groundbreaking, which is quite Continue reading “Samsung Begins Operations at its Xi’an Fab”

Researchers Devise 4-D Memory

Only months after Samsung’s announcement of 3D memory production a new 4-dimensional memory has been prototyped by university researchers. This memory not only has bits in the X and Y dimensions, like planar NAND, and the Z dimension, like 3D NAND, but it also grows in capacity over time, spanning the fourth dimension: time.

This research has been spearheaded by George P. Burdell, Assistant Associate Professor pro tem at Death Valley University. The work is the culmination of a decades-long effort to find a way to increase memory sizes in systems without the need to replace chips or modules.

The team has created the name “Growing RAM” or “GRAM” for the technology. Current prototypes exhibit very favorable Continue reading “Researchers Devise 4-D Memory”

Spansion’s Super-Fast HyperFlash NOR

Spansion recently introduced a NOR flash that the company boasts is the: “World’s fastest NOR flash memory”. Named HyperFlash, the chip taps into high-speed SPI interface, doubling its width and adding a differential clock to run at an I/O rates as high as 333MB/s.

In this post’s graphic (click to enlarge) Spansion compares the HyperFlash chip’s sustained read rate (right-hand column) to that of (from left to right) asynchronous parallel NOR, single-bit SPI, industry-standard DDR Quad SPI, and Spansion’s faster rendition of DDR Quad SPI, which Spansion tells us, until now, has been the fastest flash on the market. The company points out that HyperFlash is five times the speed of industry-standard Continue reading “Spansion’s Super-Fast HyperFlash NOR”

Comparing Samsung V-NAND to Micron 16nm Planar NAND

I was recently directed to a very interesting blog post written by 3D technologist Andrew Walker of Schiltron in which he compares two NAND flash chips that were presented at the IEEE International Solid State Circuits Conference (ISSCC) on February 12.

The post, titled Samsung’s V-NAND Flash at the 2014 ISSCC: Ye Distant Spires… is on the 3D InCites website.

Dr. Walker puts a lot more time and effort into his graphic representations of 3D NAND chips than do others (The Memory Guy included) and this makes it much easier to understand the issues he points out. He shows us that Samsung’s 3D NAND cell is about 5 times the size of a 40nm planar NAND cell and about 30 times that of Micron’s 16nm planar cell, and that the 3D NAND’s physical area is unlikely to change with any future 3D technology generations.

For this and other reasons (given in the article) he states that the Samsung V-NAND is “an impressive achievement but not a realistic foundation for the future.”

After having compiled my series on 3D NAND I can appreciate Dr. Walker’s opinion. This is certainly going to be a difficult technology to master, and it could be quite some time before the cost structure for 3D NAND can compete against that of today’s planar technologies.

Give the Walker post a quick read and judge for yourself whether we are at the brink of a 3D conversion or if this technology can be expected to slip out a few years.

Why NAND is So Difficult to Scale

NAND flash is the process leader in memory technology, and this puts it in a very challenging position: It must ramp to high volume production using techniques that have never been tried before.

The graphic for this post (click to enlarge), supplied by ASML, the semiconductor industry’s leading lithography tool supplier, illustrates the challenge of migrating from one process node to the next. Across the bottom, on the X-axis, are representative process nodes ranging from “2D-45”, or two-dimensional (planar) 45nm NAND, to “3D-5x”, or three-dimensional 5xnm NAND. Below these numbers are the year of volume production.

The vertical axis, labeled “Tolerance” represents the minimum Continue reading “Why NAND is So Difficult to Scale”

NVMdurance – Making NAND Flash Last Longer

Few NAND flash users realize that these chips have a lot of internally-adjusted parameters that are tuned to optimize performance, endurance, and yield. The operation of these parameters is a closely-held secret that flash makers share with very few of their most important customers. Other customers won’t even learn how to access these parameters!

The Memory Guy can’t claim to know what any of the parameters really are, but I have been given the understanding that they control things like the voltage thresholds used to determine which bit is represented on an MLC cell, or how much energy to put into a bit cell when it’s being programmed or erased. I hear that there are hundreds of these parameters, and they are all painstakingly hand-tuned by highly talented experts during a new chip’s characterization phase to assure that the chip will yield to the required specifications. Once the magic set of parameters has been determined, then the parameters of all subsequent chips are set to the same values.

It’s a long and arduous struggle to get the first chip tuned, though.

Some university researchers in Ireland decided that there must be a better way to do this and created Continue reading “NVMdurance – Making NAND Flash Last Longer”

Did SK hynix Beat Samsung to the 8Gb LPDDR4?

Every so often something very strange happens that puzzles The Memory Guy. On December 29 (or Dec. 30 in Seoul) something odd occurred.

I received two e-mails, one from SK hynix at 3:55 PM Pacific Time, and one from Samsung exactly one hour later. Both were press releases.

The SK hynix release was titled: “SK Hynix Developed the World’s First Next Generation Mobile Memory LPDDR4”. It announced that the company is sampling its 20nm-class 8Gb LPDDR4 DRAM to customers.

The Samsung release was Continue reading “Did SK hynix Beat Samsung to the 8Gb LPDDR4?”

Rambus and Micron Sign License Agreement

The following is excerpted from an Objective Analysis Alert that can be downloaded from the company’s website.

Rambus and Micron announced on Tuesday that they have signed a patent cross license agreement. Micron receives rights to Rambus IC patents, including memories. Both Micron and Elpida products will be covered. The companies have thus settled all outstanding patent and antitrust claims in their 13-year court battle.

Micron will make royalty payments to Rambus of up to $10 million per quarter over the next seven years, totaling $280 million, after which Micron will receive a perpetual, paid-up license.

Rambus and Micron both have Continue reading “Rambus and Micron Sign License Agreement”