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3D NAND: Who Will Make It and When?

(The following is an update of a post that originally ran on 13 December 2013. It was republished in 2024 as a part of a series on The Memory Guy blog to honor the 3D NAND inventors who have received the 2024 FMS Lifetime Achievement Award.)

This series, originally run in 2013, has looked at 3D NAND technology in a good deal of technical depth. At that time, the last question to be answered centered around the players and the timing that the technology would Continue reading “3D NAND: Who Will Make It and When?”

Samsung’s View on Charge Trap Flash

At the Flash Memory Summit yesterday ES Jung, PhD, EVP & GM for the Samsung R&D Center, explained the inner workings of Samsung’s new V-NAND vertical NAND flash technology. I will shortly be writing a series to explain what a 3D NAND is since there is little on the web that gives clear details about the technology.

One key attribute of most 3D NAND approaches is the use of a charge trapping layer. This has to do with the difficulty of manufacturing sideways floating gates.

Dr Jung delighted the show’s audience by explaining that a standard floating gate is like Continue reading “Samsung’s View on Charge Trap Flash”