3D NAND: Who Will Make It and When?

SK hynix 3D NAND Cross Section(The following is an update of a post that originally ran on 13 December 2013.  It was republished in 2024 as a part of a series on The Memory Guy blog to honor the 3D NAND inventors who have received the 2024 FMS Lifetime Achievement Award.)


This series, originally run in 2013, has looked at 3D NAND technology in a good deal of technical depth.  At that time, the last question to be answered centered around the players and the timing that the technology would Continue reading “3D NAND: Who Will Make It and When?”

3D NAND: Making a Vertical String

Toshiba's Original BiCS Diagram - IEDM 2007(The following is an update of a post that originally ran on 1 November 2013.  It was republished in 2024 as a part of a series to honor the 3D NAND inventors who have received the 2024 FMS Lifetime Achievement Award.)


Let’s look at how one form of 3D NAND is manufactured.  For this post we will explore Continue reading “3D NAND: Making a Vertical String”

Cheesecake and Floating Gates

Dr. Simon Sze, Co-Inventor of the Floating GateOne of the more fun aspects of last week’s Flash Memory Summit was the presentation of the Lifetime Achievement Award.  This is something that the show’s management has allowed me to do for the past four events.

This year’s award went to Dr. Simon Sze, who co-invented the floating gate transistor (the basis for all flash, EEPROM, and EPROM) at Bell Labs back in 1967.

Sze and his partner Dawon Kahng were finishing lunch in the company cafeteria with a cheesecake dessert.  The two discussed what would happen if a MOSFET was built with extra layers like the layers in the cake.  Their intent was to use semiconductors to replace Continue reading “Cheesecake and Floating Gates”

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